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[CUTLASS] More robust support for pattern matching and alignment #9698

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merged 13 commits into from
Dec 14, 2021

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@masahi masahi commented Dec 10, 2021

  • Introduce "check" functions for merge composite to reject invalid input layout and dtype.
  • Fix GEMM kernel selection for cases where N, K dimensions are not divisible by 8, 4 etc, i.e. align = 1 is mandatory. This came up in MaskRCNN where there is a workload (M, N, K) = (?, 91, 1024). Since the output shape is (?, 91), we cannot do vectorized memory access on the output tensor. Hence, only align = 1 variants are valid candidates. The same fix also enabled offloading conv2d with IC = 3 case.
  • On dynamic workload, since the input size can be anything, only align = 1 variants are valid candidates.
  • Fixed im2col encoding of conv2d (see the change in gen_conv2d.py ). But this code will be removed soon anyway when I introduce the dedicated conv2d profiler and kernel selection.

Since we need to use align = 1 kernels for cases above and CUTLASS sm80 gemm kernels do not seem to support align=1, I had to add sm75 kernels to sm80 kernel selection (see the change in gen_tensor_op.py). It turned out sm75 kernels are faster than sm80 on RTX 3070 on some workloads, so mixing sm75 and 80 seems to be a good idea.

cc @comaniac @Laurawly

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LGTM

@masahi masahi force-pushed the cutlass-more-robust branch 3 times, most recently from 2714e30 to cd83677 Compare December 11, 2021 07:28
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masahi commented Dec 11, 2021

@comaniac @Laurawly I disabled offloading depth wise conv2d to cutlass, since cutlass doesn't seem to support it. Anyway, depth wise conv2d is not slow and doesn't run on tensor core, so I think it is ok.

@masahi masahi force-pushed the cutlass-more-robust branch 3 times, most recently from 807ea11 to 5b439d1 Compare December 13, 2021 13:18
@masahi masahi force-pushed the cutlass-more-robust branch from 5b439d1 to 1d5ce30 Compare December 13, 2021 14:13
@masahi masahi force-pushed the cutlass-more-robust branch from 1d5ce30 to 73740c4 Compare December 13, 2021 20:38
@masahi masahi merged commit d1dafbd into apache:main Dec 14, 2021
ylc pushed a commit to ylc/tvm that referenced this pull request Jan 7, 2022
…che#9698)

* bug fix in im2col encoding

* skip legalize when batch size is dynamic

* add sm75 kernels to sm80 profilings

* add dtype and layout check in parttern match

* use align1 kernel for unusual channel cases (IC = 3 etc)

* test IC=3 convolution

* fixed check functions for fused cases, run infer type before mergecomposite

* check align on N dim

* add comment on IC == 3 case

* lint fix

* do not offload depthwise conv2d

* lint

* trigger CI
yangulei pushed a commit to yangulei/tvm that referenced this pull request Jan 11, 2022
…che#9698)

* bug fix in im2col encoding

* skip legalize when batch size is dynamic

* add sm75 kernels to sm80 profilings

* add dtype and layout check in parttern match

* use align1 kernel for unusual channel cases (IC = 3 etc)

* test IC=3 convolution

* fixed check functions for fused cases, run infer type before mergecomposite

* check align on N dim

* add comment on IC == 3 case

* lint fix

* do not offload depthwise conv2d

* lint

* trigger CI
yangulei pushed a commit to yangulei/tvm that referenced this pull request Jan 12, 2022
…che#9698)

* bug fix in im2col encoding

* skip legalize when batch size is dynamic

* add sm75 kernels to sm80 profilings

* add dtype and layout check in parttern match

* use align1 kernel for unusual channel cases (IC = 3 etc)

* test IC=3 convolution

* fixed check functions for fused cases, run infer type before mergecomposite

* check align on N dim

* add comment on IC == 3 case

* lint fix

* do not offload depthwise conv2d

* lint

* trigger CI
ylc pushed a commit to ylc/tvm that referenced this pull request Jan 13, 2022
…che#9698)

* bug fix in im2col encoding

* skip legalize when batch size is dynamic

* add sm75 kernels to sm80 profilings

* add dtype and layout check in parttern match

* use align1 kernel for unusual channel cases (IC = 3 etc)

* test IC=3 convolution

* fixed check functions for fused cases, run infer type before mergecomposite

* check align on N dim

* add comment on IC == 3 case

* lint fix

* do not offload depthwise conv2d

* lint

* trigger CI
qsqqsqqsq-intellif pushed a commit to qsqqsqqsq-intellif/tvm that referenced this pull request Apr 29, 2022
…che#9698)

* bug fix in im2col encoding

* skip legalize when batch size is dynamic

* add sm75 kernels to sm80 profilings

* add dtype and layout check in parttern match

* use align1 kernel for unusual channel cases (IC = 3 etc)

* test IC=3 convolution

* fixed check functions for fused cases, run infer type before mergecomposite

* check align on N dim

* add comment on IC == 3 case

* lint fix

* do not offload depthwise conv2d

* lint

* trigger CI
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2 participants