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Fixing up PLIO compiler support and creating an example
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75 changes: 75 additions & 0 deletions
75
programming_examples/basic/passthrough_dmas_plio/CMakeLists.txt
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,75 @@ | ||
| # This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
| # See https://llvm.org/LICENSE.txt for license information. | ||
| # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| # | ||
| # (c) Copyright 2023 Advanced Micro Devices, Inc. | ||
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| # parameters | ||
| # -DBOOST_ROOT: Path to Boost install | ||
| # -DXRT_INC_DIR: Full path to src/runtime_src/core/include in XRT cloned repo | ||
| # -DXRT_LIB_DIR: Path to xrt_coreutil.lib | ||
| # -DTARGET_NAME: Target name to be built | ||
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| # cmake needs this line | ||
| cmake_minimum_required(VERSION 3.1) | ||
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| set(CMAKE_CXX_STANDARD 23) | ||
| set(CMAKE_CXX_STANDARD_REQUIRED YES) | ||
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| find_program(WSL NAMES powershell.exe) | ||
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| if (NOT WSL) | ||
| set(CMAKE_C_COMPILER gcc-13) | ||
| set(CMAKE_CXX_COMPILER g++-13) | ||
| set(BOOST_ROOT /usr/include/boost CACHE STRING "Path to Boost install") | ||
| set(XRT_INC_DIR /opt/xilinx/xrt/include CACHE STRING "Path to XRT cloned repo") | ||
| set(XRT_LIB_DIR /opt/xilinx/xrt/lib CACHE STRING "Path to xrt_coreutil.lib") | ||
| else() | ||
| set(BOOST_ROOT C:/Technical/thirdParty/boost_1_83_0 CACHE STRING "Path to Boost install") | ||
| set(XRT_INC_DIR C:/Technical/XRT/src/runtime_src/core/include CACHE STRING "Path to XRT cloned repo") | ||
| set(XRT_LIB_DIR C:/Technical/xrtNPUfromDLL CACHE STRING "Path to xrt_coreutil.lib") | ||
| endif() | ||
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| set(TARGET_NAME test CACHE STRING "Target to be built") | ||
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| SET (ProjectName proj_${TARGET_NAME}) | ||
| SET (currentTarget ${TARGET_NAME}) | ||
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| if ( WSL ) | ||
| set(CMAKE_RUNTIME_OUTPUT_DIRECTORY_RELEASE ${CMAKE_BINARY_DIR}) | ||
| endif () | ||
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| project(${ProjectName}) | ||
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| # Find packages | ||
| find_package(Boost REQUIRED) | ||
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| add_executable(${currentTarget} | ||
| ${CMAKE_CURRENT_SOURCE_DIR}/../../../runtime_lib/test_lib/test_utils.cpp | ||
| test.cpp | ||
| ) | ||
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| target_compile_definitions(${currentTarget} PUBLIC DISABLE_ABI_CHECK=1) | ||
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| target_include_directories (${currentTarget} PUBLIC | ||
| ${XRT_INC_DIR} | ||
| ${Boost_INCLUDE_DIRS} | ||
| ${CMAKE_CURRENT_SOURCE_DIR}/../../../runtime_lib/test_lib | ||
| ) | ||
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| target_link_directories(${currentTarget} PUBLIC | ||
| ${XRT_LIB_DIR} | ||
| ${Boost_LIBRARY_DIRS} | ||
| ) | ||
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| if (NOT WSL) | ||
| target_link_libraries(${currentTarget} PUBLIC | ||
| xrt_coreutil | ||
| boost_program_options | ||
| boost_filesystem | ||
| ) | ||
| else() | ||
| target_link_libraries(${currentTarget} PUBLIC | ||
| xrt_coreutil | ||
| ) | ||
| endif() |
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| ##===- Makefile -----------------------------------------------------------===## | ||
| # | ||
| # This file licensed under the Apache License v2.0 with LLVM Exceptions. | ||
| # See https://llvm.org/LICENSE.txt for license information. | ||
| # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| # | ||
| # Copyright (C) 2024, Advanced Micro Devices, Inc. | ||
| # | ||
| ##===----------------------------------------------------------------------===## | ||
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| srcdir := $(shell dirname $(realpath $(firstword $(MAKEFILE_LIST)))) | ||
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| include ${srcdir}/../../makefile-common | ||
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| devicename ?= xcvc1902 | ||
| col ?= 26 | ||
| targetname = passThroughDMAs | ||
| LENGTH ?= 1024 | ||
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| all: input output | ||
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| build/aie-input-plio.mlir: ${srcdir}/aie2-input-plio.py | ||
| mkdir -p ${@D} | ||
| python3 $< ${LENGTH} ${devicename} ${col} > $@ | ||
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| build/aie-output-plio.mlir: ${srcdir}/aie2-output-plio.py | ||
| mkdir -p ${@D} | ||
| python3 $< ${LENGTH} ${devicename} ${col} > $@ | ||
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| input: build/aie-input-plio.mlir | ||
| aiecc.py --link_against_hsa --host-target=x86_64-amd-linux-gnu build/aie-input-plio.mlir \ | ||
| -I${srcdir}/../../../install/runtime_lib/x86_64-hsa/test_lib/include \ | ||
| -L/lib/x86_64-linux-gnu/ \ | ||
| ${srcdir}/test_vck5000.cpp \ | ||
| ${srcdir}/../../../install/runtime_lib/x86_64-hsa/test_lib/src/test_library.cpp \ | ||
| -Wl,--whole-archive -Wl,--no-whole-archive -lstdc++ -ldl -lelf -o input.elf | ||
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| output: build/aie-output-plio.mlir | ||
| aiecc.py --link_against_hsa --host-target=x86_64-amd-linux-gnu build/aie-output-plio.mlir \ | ||
| -I${srcdir}/../../../install/runtime_lib/x86_64-hsa/test_lib/include \ | ||
| -L/lib/x86_64-linux-gnu/ \ | ||
| ${srcdir}/test_vck5000.cpp \ | ||
| ${srcdir}/../../../install/runtime_lib/x86_64-hsa/test_lib/src/test_library.cpp \ | ||
| -Wl,--whole-archive -Wl,--no-whole-archive -lstdc++ -ldl -lelf -o output.elf | ||
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| run_vck5000: | ||
| test.elf | ||
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| clean: | ||
| rm -rf build aie-output-plio.mlir.prj aie-input-plio.mlir.prj core_* input.elf output.elf |
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27
programming_examples/basic/passthrough_dmas_plio/README.md
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| <!---//===- README.md --------------------------*- Markdown -*-===// | ||
| // | ||
| // This file is licensed under the Apache License v2.0 with LLVM Exceptions. | ||
| // See https://llvm.org/LICENSE.txt for license information. | ||
| // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception | ||
| // | ||
| // Copyright (C) 2024, Advanced Micro Devices, Inc. | ||
| // | ||
| //===----------------------------------------------------------------------===//--> | ||
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| # <ins>Passthrough DMAs with PLIO</ins> | ||
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| This reference design can be run on the VCK5000 Versal device. This design leverages the same data movement pattern as the [Passthrough DMAs](../passthrough-dmas) example design but it uses a soft DMA. Please see the [platforms repo](https://github.com/Xilinx/ROCm-air-platforms) for more information on how the programmable logic is integrated with the AIEs. This is meant to be an illustrative example to highlight how to integrate PL designs with AIE designs programmed using mlir-aie. | ||
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| In the platform, tile (26, 0) has PLIO connected to a DMA implemented in the programmable logic. There are two designs, `aie2-input-plio.py` uses the soft DMA to push data from DRAM into the AIEs, wheras `aie2-output-plio.py` uses the soft DMA to receive data from the AIEs and push it to DRAM. The soft DMA is programmed using the same mechanism as the ShimDMAs. | ||
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| In the [design](./aie2.py) data is brought from external memory to `ComputeTile2` and back, without modification from the tile, by using an implicit copy via the compute tile's Data Movement Accelerator (DMA). The data is read from and written to external memory through the Shim tile (`col`, 0). | ||
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| The implicit copy is performed using the `object_fifo_link` operation that specifies how input data arriving via `of_in` should be sent further via `of_out` by specifically leveraging the compute tile's DMA. This operation and its functionality are described in more depth in [Section-2b](../../../programming_guide/section-2/section-2b/03_Link_Distribute_Join/README.md#object-fifo-link) of the programming guide. | ||
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| To compile and run the design for VCK5000: | ||
| ``` | ||
| make all | ||
| ./output.elf // To run the kernel which outputs over PLIO | ||
| ./input.elf // To run the kernel which inputs over PLIO | ||
| ``` |
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