liteeth: Regenerate with rgmii hw_init_reset

Non-rgmii devices are unchanged Fixes intermittent ethernet on antmicro-artix-dc-scm. enjoy-digital/liteeth#119 Built with liteeth CodeConstruct/liteeth@dbb13f1 ("liteeth/gen: Use hw_init_reset for rgmii") litex master 4426e618 ("soc/add_pcie: Expose with_synchronizer parameter.") Signed-off-by: Matt Johnston <[email protected]>
CodeConstruct · Oct 13, 2022 · 494f968 · 494f968
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commit 494f968
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Showing 8 changed files with 142 additions and 120 deletions.
diff --git a/liteeth/generated/antmicro-artix-dc-scm/csr.csv b/liteeth/generated/antmicro-artix-dc-scm/csr.csv
@@ -1,5 +1,5 @@
 #--------------------------------------------------------------------------------
-# Auto-generated by LiteX (--------) on 2022-09-02 16:00:41
+# Auto-generated by LiteX (--------) on 2022-09-06 11:07:46
 #--------------------------------------------------------------------------------
 csr_base,ctrl,0x00000000,,
 csr_base,ethphy,0x00000800,,

diff --git a/liteeth/generated/antmicro-artix-dc-scm/liteeth_core.v b/liteeth/generated/antmicro-artix-dc-scm/liteeth_core.v
diff --git a/liteeth/generated/arty/csr.csv b/liteeth/generated/arty/csr.csv
@@ -1,5 +1,5 @@
 #--------------------------------------------------------------------------------
-# Auto-generated by LiteX (--------) on 2022-09-02 15:55:19
+# Auto-generated by LiteX (--------) on 2022-09-06 11:07:45
 #--------------------------------------------------------------------------------
 csr_base,ctrl,0x00000000,,
 csr_base,ethphy,0x00000800,,

diff --git a/liteeth/generated/arty/liteeth_core.v b/liteeth/generated/arty/liteeth_core.v
@@ -9,7 +9,7 @@
 // Filename   : liteeth_core.v
 // Device     : 
 // LiteX sha1 : --------
-// Date       : 2022-09-02 15:55:19
+// Date       : 2022-09-06 11:07:45
 //------------------------------------------------------------------------------
 
 
@@ -3876,5 +3876,5 @@ assign main_sram3_dat_r = mem_3[mem_3_adr1];
 endmodule
 
 // -----------------------------------------------------------------------------
-//  Auto-Generated by LiteX on 2022-09-02 15:55:19.
+//  Auto-Generated by LiteX on 2022-09-06 11:07:45.
 //------------------------------------------------------------------------------
diff --git a/liteeth/generated/nexys-video/csr.csv b/liteeth/generated/nexys-video/csr.csv
@@ -1,5 +1,5 @@
 #--------------------------------------------------------------------------------
-# Auto-generated by LiteX (--------) on 2022-09-02 15:55:19
+# Auto-generated by LiteX (--------) on 2022-09-06 11:07:45
 #--------------------------------------------------------------------------------
 csr_base,ctrl,0x00000000,,
 csr_base,ethphy,0x00000800,,

diff --git a/liteeth/generated/nexys-video/liteeth_core.v b/liteeth/generated/nexys-video/liteeth_core.v
diff --git a/liteeth/generated/wukong-v2/csr.csv b/liteeth/generated/wukong-v2/csr.csv
@@ -1,5 +1,5 @@
 #--------------------------------------------------------------------------------
-# Auto-generated by LiteX (--------) on 2022-09-02 15:55:20
+# Auto-generated by LiteX (--------) on 2022-09-06 11:07:46
 #--------------------------------------------------------------------------------
 csr_base,ctrl,0x00000000,,
 csr_base,ethphy,0x00000800,,

diff --git a/liteeth/generated/wukong-v2/liteeth_core.v b/liteeth/generated/wukong-v2/liteeth_core.v
@@ -9,7 +9,7 @@
 // Filename   : liteeth_core.v
 // Device     : xc7
 // LiteX sha1 : --------
-// Date       : 2022-09-02 15:55:20
+// Date       : 2022-09-06 11:07:46
 //------------------------------------------------------------------------------
 
 
@@ -4219,5 +4219,5 @@ ODDR #(
 endmodule
 
 // -----------------------------------------------------------------------------
-//  Auto-Generated by LiteX on 2022-09-02 15:55:20.
+//  Auto-Generated by LiteX on 2022-09-06 11:07:46.
 //------------------------------------------------------------------------------