Discussions

• 1 You must be logged in to vote

  #️⃣

  Version 2024.07

  kenta2 started Sep 6, 2024 in Releases

  

  

  1
• 1 You must be logged in to vote

  🙏

  Strange evaluation-time error when comparing two FloatingPoint values

  RyanGlScott asked Jul 9, 2024 in Q&A · Answered

  

  

  

  

  4
• 1 You must be logged in to vote

  🙏

  Floating Point Library

  ADTSemi asked Jun 4, 2024 in Q&A · Unanswered

  

  

  2
• 1 You must be logged in to vote

  💬

  Missing functions in FloatingPoint API?

  RyanGlScott started Jan 11, 2023 in General

  

  

  

  

  6
• 1 You must be logged in to vote

  🙏

  SAT solver inputs

  gribeill asked Apr 17, 2024 in Q&A · Answered

  

  

  

  

  5
• 1 You must be logged in to vote

  #️⃣

  Version 2024.01

  kenta2 started Mar 22, 2024 in Releases

  

  

  0
• 0 You must be logged in to vote

  💬

  Kôika HDL

  omasanori started Oct 7, 2021 in General

  

  

  1
• 1 You must be logged in to vote

  💬

  bsc regression in Typecheck/internal with large enums

  czeck started Sep 24, 2021 in General · Closed

  

  

  5
• 1 You must be logged in to vote

  🙏

  $display and registers

  RyanGlScott asked Jan 4, 2024 in Q&A · Answered

  

  

  

  

  12
• 1 You must be logged in to vote

  🙏

  Building bsc/bluetcl from source on darwin/arm64 machines

  iamkarthikbk asked Nov 20, 2023 in Q&A · Unanswered

  

  

  3
• 2 You must be logged in to vote

  🙏

  Renaming modules programatically

  iamkarthikbk asked Oct 27, 2023 in Q&A · Answered

  

  

  3
• 1 You must be logged in to vote

  🙏

  Pipelined varint compression of a vector of 16 elements.

  ealione asked Nov 1, 2023 in Q&A · Unanswered

  

  

  0
• 1 You must be logged in to vote

  💬

  Gated clocks in classic.

  rossc719g started Sep 21, 2023 in General

  

  

  3
• 1 You must be logged in to vote

  💬

  gate_input_clocks & no_implicit_conditions

  rossc719g started Sep 26, 2023 in General

  

  

  2
• 1 You must be logged in to vote

  🙏

  Verilog attributes?

  nkyparissas asked Sep 28, 2023 in Q&A · Answered

  

  

  2
• 1 You must be logged in to vote

  💬

  Intermittent runtime failures on (my?) mac.

  rossc719g started Sep 5, 2023 in General

  

  

  5
• 1 You must be logged in to vote

  💬

  ghc "impossible" heap overflow?

  rossc719g started Sep 7, 2023 in General · Closed

  

  

  2
• 0 You must be logged in to vote

  🙏

  Pure combinational circuit without registers possible?

  ju-sh asked Aug 17, 2023 in Q&A · Answered

  

  

  4
• 1 You must be logged in to vote

  🙏

  enabled_when_ready (in .bs)?

  rossc719g asked Aug 22, 2023 in Q&A · Closed · Answered

  

  

  3
• 1 You must be logged in to vote

  #️⃣

  Version 2023.07

  kenta2 started Aug 22, 2023 in Releases

  

  

  0
• 1 You must be logged in to vote

  💬

  bs classic's compose operator.

  rossc719g started Aug 4, 2023 in General

  

  

  4
• 1 You must be logged in to vote

  🙏

  vpi_wrapper_*.{ch} files... where? (and why?)

  rossc719g asked Jul 14, 2023 in Q&A · Unanswered

  

  

  8
• 1 You must be logged in to vote

  🙏

  VCD output from generated verilog

  timksf asked Jul 27, 2023 in Q&A · Closed · Answered

  

  

  2
• 1 You must be logged in to vote

  🙏

  BRAM not being utilized in spite of it being recognised during synthesis

  nkyparissas asked Jul 21, 2023 in Q&A · Answered

  

  

  4
• 1 You must be logged in to vote

  💡

  bs-classic: Swapping precedence of $ and :=

  rossc719g started Jun 23, 2023 in Ideas

  

  

  

  

  7