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ARM support #955

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e2f408b
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 10, 2023
3759cc9
another missing instruction
regehr Jan 11, 2023
6df40a9
avoid mixing cout and llvm::outs() in the lifter, just use the LLVM s…
regehr Jan 11, 2023
3fd7d32
tests for as-yet-unsupported instructions
regehr Jan 12, 2023
f2165ce
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 12, 2023
2ddb59d
oops add tests
regehr Jan 12, 2023
5b8ebb8
tiny bit of work getting ready for automatically generated instructio…
regehr Jan 13, 2023
b0eb019
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Jan 13, 2023
75cc5f3
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 13, 2023
8feee04
working towards isla-derived semantics
regehr Jan 13, 2023
1f1033d
address another deprecation in latest llvm
regehr Jan 17, 2023
d8cf213
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 17, 2023
65f55a7
Merge branch 'fix-alignment-deprecation' into arm-tv
regehr Jan 17, 2023
9ed1032
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 18, 2023
d97d4ab
add support for ADC instruction
ryan-berger Jan 19, 2023
a579d50
Merge pull request #2 from ryan-berger/arm-tv-insts
regehr Jan 19, 2023
7377057
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 23, 2023
9c16acc
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Jan 23, 2023
6348700
Added UXTH and fixed UXTB crash
Stefan-Mada Jan 23, 2023
5c34c8c
Merge pull request #3 from Stefan-Mada/arm-tv-instrs
regehr Jan 23, 2023
05ce361
new crasher for us
regehr Jan 23, 2023
b1bdd8e
another that probably hits the same crash as last one
regehr Jan 23, 2023
b3b6766
bit of cleanup
regehr Jan 25, 2023
c03b339
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 25, 2023
91f6def
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jan 25, 2023
08d58c1
test fix
regehr Jan 26, 2023
4e0a849
foo
regehr Jan 27, 2023
f6d3719
registers and flags now live in alloca cells; all the existing SSA co…
regehr Jan 28, 2023
a0a76a1
reformat
regehr Jan 28, 2023
834759a
remove old flags code
regehr Jan 28, 2023
d93a5ea
simple cleanups
regehr Jan 28, 2023
236ba9f
remove dead functions
regehr Jan 28, 2023
c8306bc
tiny changes
regehr Jan 28, 2023
7ad11d9
add test
regehr Jan 28, 2023
e598570
need a few trivial tests while doing this work
regehr Jan 28, 2023
c47f8c8
remove unused
regehr Jan 28, 2023
dd96522
oops another unused
regehr Jan 28, 2023
98f9a8b
now return instructions don't use the old way o getting values
regehr Jan 28, 2023
05fda74
minor changes
regehr Jan 29, 2023
49c7e4a
remove code
regehr Jan 29, 2023
6dd88d3
comment
regehr Jan 29, 2023
5bee31a
remove ssa implementation
regehr Jan 29, 2023
e2d2f6e
continue to remove ssa stuff
regehr Jan 29, 2023
fb3dad7
remove more
regehr Jan 29, 2023
4642e63
remove more stuff
regehr Jan 29, 2023
15a2d3b
rename file, minor changes
regehr Jan 29, 2023
6804e68
continuing to clean up
regehr Jan 29, 2023
7b211af
more cleanup
regehr Jan 29, 2023
9b02acf
tweaks
regehr Jan 29, 2023
dfb3bdf
tweaks
regehr Jan 29, 2023
56f0015
comments
regehr Jan 29, 2023
6996a47
cleanup
regehr Jan 29, 2023
e5e16db
cleanup
regehr Jan 29, 2023
102bac7
remove more stuff
regehr Jan 29, 2023
6318d9a
cleanup
regehr Jan 29, 2023
3218c9a
cleaning up still
regehr Jan 29, 2023
ee818ac
remove mc inst wrapper and name instrucitons differently
regehr Jan 29, 2023
c9ff78b
reformat
regehr Jan 29, 2023
3fcc0ba
just a bit more cleanup
regehr Jan 29, 2023
c5d67cb
adjust output a bit
regehr Jan 29, 2023
ebd75cd
tweak
regehr Jan 30, 2023
f41e81c
cleanup output a biT
regehr Jan 30, 2023
fb74215
tweaks
regehr Jan 30, 2023
7720be4
fix bug
regehr Jan 30, 2023
522482d
fuzzer parameter tweak
regehr Jan 30, 2023
aca3acb
oops, fix a crash now
regehr Jan 30, 2023
3990256
remove unused field
regehr Jan 30, 2023
d49eabf
avoid using llvm::outs at all since this output gets garbled with ali…
regehr Jan 30, 2023
612554c
oops, fix quickfuzz
regehr Jan 30, 2023
71910bb
remove overly aggressive asserts
regehr Jan 30, 2023
2480166
mem2reg works better standalone, so let's try that for now. also add …
regehr Jan 30, 2023
0fa3165
fix bug where we violated SSA
regehr Jan 30, 2023
a046390
don't emit calls in BB fuzz when we're targeting the lifter, for now
regehr Jan 30, 2023
cb1813d
protect lifted shifts from shifting too far
regehr Jan 30, 2023
5525c4c
tweak
regehr Jan 30, 2023
5675663
protect shifts the right way this time
regehr Jan 30, 2023
2b296a1
remove a couple comments
regehr Jan 30, 2023
8d7468a
add MRS and MSR
regehr Jan 30, 2023
f03cef4
tweaks
regehr Jan 30, 2023
b2b440d
initialize registers with freeze poison
regehr Jan 31, 2023
b1948c0
print lifted IR after optimization
regehr Jan 31, 2023
de59404
cleanup
regehr Jan 31, 2023
7b48f32
tweak
regehr Jan 31, 2023
0bbb8cf
fix a bug and more cleanup
regehr Jan 31, 2023
62b773b
tweaks, and change the ARM CPU target to generic instead of Apple A12
regehr Jan 31, 2023
aa5d2b9
these caused me some problems argh
regehr Jan 31, 2023
0be2668
couple more tests for missing insn
regehr Jan 31, 2023
a111eba
towards a working stack
regehr Feb 1, 2023
7cfe96d
not-yet-working parameter passing on the stack
regehr Feb 1, 2023
95ccc7d
tweaks and make stack parameters work, but the wrong way
regehr Feb 1, 2023
e02f014
list of some load instructions we need
regehr Feb 1, 2023
0880de4
comments
regehr Feb 1, 2023
6ef11fe
formatting
regehr Feb 1, 2023
3d941c2
stack is now in byteS
regehr Feb 1, 2023
2b4cb42
factor out memory code
regehr Feb 1, 2023
46ce203
more memory work
regehr Feb 1, 2023
0d5f5b3
support another load
regehr Feb 1, 2023
7275f77
refactor memory code a bit so we can add more instructions
regehr Feb 1, 2023
3c64b09
support LDPXi
regehr Feb 1, 2023
4314441
tweaks
regehr Feb 1, 2023
093e064
lots of store insts
regehr Feb 1, 2023
afcefb2
more general loads supported but not yet tested
regehr Feb 1, 2023
0c513a4
add a few test cases that we can't solve yet
regehr Feb 1, 2023
67cdacc
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Feb 2, 2023
ee18a31
use a new option Nuno added to make int2ptr work for our use case!
regehr Feb 2, 2023
51dde92
add some untested store instructions and a test case
regehr Feb 2, 2023
d2d6be9
tiny cleanup
regehr Feb 2, 2023
fd05200
tiny cleanup
regehr Feb 2, 2023
c51dde7
bit of cleanup
regehr Feb 3, 2023
7d95598
add ARM addWithCarry impl, CCMN impl, refactor ADC
ryan-berger Feb 3, 2023
75a8978
Merge pull request #4 from ryan-berger/ccmn-instr
regehr Feb 3, 2023
9ee38e1
extra output to try to figure out the streamer stuff
regehr Feb 3, 2023
2f650b8
no yeet
regehr Feb 3, 2023
628cd9f
few more CCMNW tests
regehr Feb 3, 2023
76258c4
cleanup
regehr Feb 3, 2023
4ff3578
formatting
regehr Feb 3, 2023
a4ad1f4
bug
regehr Feb 3, 2023
cea0211
fix bug
regehr Feb 3, 2023
4ab57a5
fix bugs
regehr Feb 3, 2023
eede080
hey nice our CCMN(immediate) code also works for CCMN(register)
regehr Feb 3, 2023
34650a1
turn off poison/undef inputs by default
regehr Feb 3, 2023
d7d01e5
starting to work on pointer parameters
regehr Feb 3, 2023
eb8adec
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Feb 3, 2023
48db562
formatting
regehr Feb 3, 2023
2547a45
tweak and new testcase
regehr Feb 4, 2023
fe89fea
add test cases that we currently get wrong
regehr Feb 4, 2023
56d80e6
formatting
regehr Feb 4, 2023
81181e8
towards working pointer parameters
regehr Feb 4, 2023
393c26d
pointer arguments work, at least for very basic cases
regehr Feb 4, 2023
39fb311
formatting
regehr Feb 4, 2023
a216b72
test case
regehr Feb 4, 2023
83b25b2
more store instructions + tests for them
regehr Feb 5, 2023
fb33fb5
foo
regehr Feb 5, 2023
80fd3f6
add an STP variant and fix bugs in the other one
regehr Feb 5, 2023
79edb06
add STURs
regehr Feb 5, 2023
63ca764
add lots of auto-generated memory tests, also support 32-bit LDP
regehr Feb 5, 2023
92f8fa8
tiny cleanup, add some global variable tests that we currently fail
regehr Feb 5, 2023
4aab816
towards globals
regehr Feb 6, 2023
7dbccf2
towards globals
regehr Feb 6, 2023
2e34fb8
towards supporting global variables
regehr Feb 6, 2023
ece27a3
still working on globals
regehr Feb 6, 2023
55b598a
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Feb 7, 2023
18ac084
lots of tests, fix a case where we couldn't find a global in the asm
regehr Feb 7, 2023
83dcce3
Triple.h moved
regehr Feb 7, 2023
7f1d865
Merge remote-tracking branch 'origin/moved-header' into arm-tv
regehr Feb 7, 2023
42c13ea
foo
regehr Feb 7, 2023
a52eada
explicitly reject code containing calls and invokes
regehr Feb 8, 2023
b210613
foo
regehr Feb 8, 2023
0b0b126
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Feb 8, 2023
575fc34
reject inputs containing int2ptr
regehr Feb 8, 2023
a1f62d9
foo
regehr Feb 8, 2023
5d0fd03
tweak
regehr Feb 8, 2023
1aa412a
move error check ahead of early exit
regehr Feb 8, 2023
bd64136
a few tweaks plus support functions that return a pointer
regehr Feb 9, 2023
8f55ae7
error tweak
regehr Feb 9, 2023
126bc8f
cleanup
regehr Feb 9, 2023
90bca6b
fix a long-standing silly thing that was making us not get error mess…
regehr Feb 9, 2023
c18a304
foo
regehr Feb 9, 2023
e970ec9
tweaking stuff
regehr Feb 9, 2023
e850cce
towards supporting the frame pointeR
regehr Feb 9, 2023
3c03f27
much more realistic stack support
regehr Feb 9, 2023
5eaf68d
error out for volatiles and atomics
regehr Feb 10, 2023
ff3dc96
refactor
regehr Feb 10, 2023
d70b194
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Feb 10, 2023
f663cdf
do a better job rejecting atomics
regehr Feb 10, 2023
e25a99e
error handling work
regehr Feb 10, 2023
a335731
error message hacking
regehr Feb 10, 2023
9dbc3fe
fix typo and formatting
regehr Feb 10, 2023
517a3a2
proper frame pointer support
regehr Feb 10, 2023
95a4639
reject address spaces other than 0
regehr Feb 10, 2023
3f4ed0c
still more safety checks
regehr Feb 10, 2023
9b40ca9
bug fixes
regehr Feb 11, 2023
eb72ddf
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Feb 11, 2023
57eefbb
error tweak
regehr Feb 12, 2023
8754ac6
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Feb 12, 2023
e26ea78
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Feb 12, 2023
5c9b4aa
more error tweaking
regehr Feb 12, 2023
efaa9dc
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Feb 12, 2023
9729bbb
another deprecation
regehr Feb 14, 2023
119d133
fuzzer refactoring
regehr Feb 19, 2023
eee3ef9
foo
regehr Feb 19, 2023
ca42cc3
foo
regehr Feb 19, 2023
c0705d1
foo
regehr Feb 19, 2023
0fb5e4f
foo
regehr Feb 21, 2023
7c60d02
foo
regehr Feb 24, 2023
b273cc0
foo
regehr Feb 24, 2023
69862a8
foo
regehr Feb 24, 2023
e85e854
starting to work on function calls
regehr Feb 27, 2023
31f63af
print seed again
regehr Feb 27, 2023
cbb0df0
formatting
regehr Feb 27, 2023
065deea
less chatty
regehr Feb 28, 2023
daa60d4
more reduce chattiness
regehr Feb 28, 2023
f51bf7d
register debug support, but not implementation
regehr Feb 28, 2023
266132c
longstanding bug in ccmn fixed
regehr Mar 1, 2023
18d2b1c
make code a bit more concuse
regehr Mar 1, 2023
c256395
codegen from a cloned module to avoid unwanted optimizations
regehr Mar 2, 2023
70088ca
comment
regehr Mar 2, 2023
e694476
foo
regehr Mar 4, 2023
3051b79
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Mar 4, 2023
bb35925
temporary commit
regehr Mar 5, 2023
ace4eb7
oops commit
regehr Mar 6, 2023
91d6d11
Merge branch 'avoid-isNullValue' into arm-tv
regehr Mar 6, 2023
6cb3b24
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Mar 11, 2023
ad51f97
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Mar 11, 2023
bddd52f
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Mar 12, 2023
c0f41d6
new failing test from Stefan
regehr Mar 12, 2023
e07c5a8
remove refs to deleted LLVM header
regehr Mar 14, 2023
e964758
Merge branch 'remove-passmanagerbuilder-header' into arm-tv
regehr Mar 14, 2023
124dea2
foo
regehr Mar 14, 2023
202bc5d
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Mar 20, 2023
31378cd
Added STRXPre and STRWPre
Stefan-Mada Mar 11, 2023
96921b5
Added tests for STRXpre and STRWpre
Stefan-Mada Mar 21, 2023
5f2007f
foo
regehr Mar 21, 2023
b9ce072
Merge pull request #5 from Stefan-Mada/arm-tv-instrs
regehr Mar 23, 2023
b29bec9
Merge remote-tracking branch 'origin/master' into arm-tv
regehr May 23, 2023
59f58f2
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Jul 19, 2023
1d9d46e
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Aug 13, 2023
747837e
Merge remote-tracking branch 'upstream/master' into arm-tv
regehr Sep 5, 2023
da2b516
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 12, 2023
38487ab
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Sep 12, 2023
218241f
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 25, 2023
2a7c709
foo
regehr Sep 25, 2023
aa1336e
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 25, 2023
9239e5b
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 25, 2023
f607aa4
foo
regehr Sep 25, 2023
b9cf113
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 25, 2023
833d325
foo
regehr Sep 25, 2023
c9030ea
foo
regehr Sep 25, 2023
bbf8dee
foo
regehr Sep 25, 2023
b883024
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 26, 2023
7c6859c
foo
regehr Sep 26, 2023
ee39426
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 27, 2023
5f16daa
add check for a single function in the module, until we relax this
regehr Sep 27, 2023
9f14c3d
foo
regehr Sep 30, 2023
b4d8f6f
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Sep 30, 2023
8414552
Added RegFile for SIMD&FP registers and instruction support for LDRDu…
tanmaytirpankar Oct 2, 2023
4a38060
reformat
regehr Oct 2, 2023
5240d82
add vector tests
regehr Oct 2, 2023
feafbe1
add a parameter test case
regehr Oct 2, 2023
ad0d57e
first cut at support for passing vector values in registers
regehr Oct 3, 2023
e162f2f
format
regehr Oct 3, 2023
a416028
foo
regehr Oct 5, 2023
3e04ba2
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Oct 5, 2023
e3ed9c5
foo
regehr Oct 5, 2023
5dea32b
ignore all the silly vector tests I added
regehr Oct 6, 2023
c51c6b8
support custom pass pipeline for optimizing lifted IR
regehr Oct 16, 2023
b519680
arm-tv (#9)
tanmaytirpankar Nov 2, 2023
7fb9803
Merge remote-tracking branch 'origin/master' into arm-tv
regehr Nov 2, 2023
9cb3d31
Merge branch 'arm-tv' of github.com:regehr/alive2 into arm-tv
regehr Nov 2, 2023
6a24dfe
refactoring, hopefully nfc
regehr Oct 3, 2023
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2 changes: 2 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -3,3 +3,5 @@
build*/
*.pyc
CMakeSettings.json
temp/*
tests/temp/*
15 changes: 15 additions & 0 deletions ARM-TODO.md
Original file line number Diff line number Diff line change
@@ -0,0 +1,15 @@
ALIVE-ARM-TV TODO list
================

Many things required to be done. Listing things things that come to mind at the moment
-------------------------------------

- process the debug info in the assembly parser

- handle functions with different number of parameters (either using the src IR file or from debug info)
- for now, lets use the IR fileand support simple parameters passed thru registers

- handle different types

- investigate if arm asl can be used to lift arm instructions to alive IR

25 changes: 25 additions & 0 deletions BugList.md
Original file line number Diff line number Diff line change
Expand Up @@ -110,3 +110,28 @@ Please contact us or submit a PR if something is missing or inaccurate.
17. Crash with FP<->BV conversions (https://github.com/Z3Prover/z3/issues/6460)
18. Integer overflow (https://github.com/Z3Prover/z3/commit/a96f5a9b425b6f5ba7e8ce1c1a75db6683c4bdc9)
19. Memory leak with arrays on timeout (https://github.com/Z3Prover/z3/commit/dda0c8ff4200faa6a441855716b47ec7f93e026e)

### Miscompilation bugs found in ARM64 Backend
1. GlobalIsel miscompiles an llvm.fshl instruction (https://github.com/llvm/llvm-project/issues/55003)
2. GlobalIsel miscompiles a zero-extended logical shift right (https://github.com/llvm/llvm-project/issues/55129)
3. Incorrect optimization of sitofp/fptosi roundtrip (https://github.com/llvm/llvm-project/issues/55150)
4. Miscompilation on a shift followed by an icmp instruction (https://github.com/llvm/llvm-project/issues/55178)
5. Miscompilation when backend attempts to lower to a rotate instruction (https://github.com/llvm/llvm-project/issues/55201)
6. Miscompilation with urem and undef (https://github.com/llvm/llvm-project/issues/55271)
7. or followed by and miscompile with global isel on arm64 (https://github.com/llvm/llvm-project/issues/55284)
8. urem and udiv miscompile with global isel set on arm64 (https://github.com/llvm/llvm-project/issues/55287)
9. fshl-related miscompile by arm64 and x86-64 backends (https://github.com/llvm/llvm-project/issues/55296)
10. Miscompilation of arithmetic binops with constant params (https://github.com/llvm/llvm-project/issues/55342)
11. Miscompilation in multiple backends including arm64 and x86-64 (https://github.com/llvm/llvm-project/issues/55484)
12. Miscompilation involving arithmentic binops (https://github.com/llvm/llvm-project/issues/55490)
13. Miscompilation of non-canonical add+icmp (https://github.com/llvm/llvm-project/issues/55627)
14. Miscompilation of smul.with.overflow.i2 (https://github.com/llvm/llvm-project/issues/55644)
15. Funnel shift related miscompile by ARM64 backend with global isel (https://github.com/llvm/llvm-project/issues/56664)
16. Possible miscompile of signext-of-i1 by aarch64 backend (https://github.com/llvm/llvm-project/issues/57181)
17. GlobalIsel backend miscompiles funnel shift with undef amount (https://github.com/llvm/llvm-project/issues/57256)
18. Miscompile of code involving a usub.sat by AArch64 backend (https://github.com/llvm/llvm-project/issues/58109)
19. Miscompilation of a frozen poison by AArch64 backend (https://github.com/llvm/llvm-project/issues/58321)
20. AArch64 backend miscompile of some funnel shifts (https://github.com/llvm/llvm-project/issues/59898)
21. Miscompile by AArch64 backend related to smax.i64 (https://github.com/llvm/llvm-project/issues/59902)
22. miscompile from AArch64 global isel backend (https://github.com/llvm/llvm-project/issues/61008)
=======
26 changes: 21 additions & 5 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -20,7 +20,7 @@ if (MSVC)
set(CMAKE_EXE_LINKER_FLAGS "/LTCG:INCREMENTAL ${CMAKE_EXE_LINKER_FLAGS}")
else()
set(CMAKE_CXX_FLAGS "-Wall -Werror -fPIC -fstrict-enums ${CMAKE_CXX_FLAGS}")
set(CMAKE_CXX_FLAGS_DEBUG "-g -Og ${CMAKE_CXX_FLAGS_DEBUG}")
set(CMAKE_CXX_FLAGS_DEBUG "-g -O0 -fsanitize=address,undefined -fno-sanitize-recover=undefined -fno-sanitize=vptr ${CMAKE_CXX_FLAGS_DEBUG}")
set(CMAKE_CXX_FLAGS_RELEASE "-O3 ${CMAKE_CXX_FLAGS_RELEASE}")
set(CMAKE_CXX_FLAGS_RELWITHDEBINFO "${CMAKE_CXX_FLAGS_RELEASE} -g ${CMAKE_CXX_FLAGS_RELWITHDEBINFO}")
endif()
Expand Down Expand Up @@ -181,6 +181,8 @@ if (BUILD_LLVM_UTILS OR BUILD_TV)
include(AddLLVM)

include_directories(${LLVM_INCLUDE_DIRS})
include_directories(${LLVM_BINARY_DIR}/lib)

add_definitions(${LLVM_DEFINITIONS})

set(LLVM_UTIL_SRCS
Expand All @@ -191,15 +193,27 @@ if (BUILD_LLVM_UTILS OR BUILD_TV)
"llvm_util/utils.cpp"
)

set(BACKEND_TV_SRCS
"backend_tv/adjust_src.cpp"
"backend_tv/lifter.cpp"
"backend_tv/run_backend.cpp"
)

add_library(llvm_util STATIC ${LLVM_UTIL_SRCS})
set(ALIVE_LIBS_LLVM llvm_util ${ALIVE_LIBS})
add_library(backend_tv STATIC ${BACKEND_TV_SRCS})
set(ALIVE_LIBS_LLVM llvm_util backend_tv ${ALIVE_LIBS})
set(ALIVE_EXEC_LIBS_LLVM llvm_util backend_tv ${ALIVE_EXEC_LIBS})

set(LLVM_LINK_COMPONENTS ${LLVM_LINK_COMPONENTS} TargetParser)

add_llvm_executable(alive-tv
"tools/alive-tv.cpp"
)

add_llvm_executable(backend-tv
"tools/backend-tv.cpp"
)

add_llvm_executable(quick-fuzz
"tools/quick-fuzz.cpp"
)
Expand All @@ -210,6 +224,7 @@ if (BUILD_LLVM_UTILS OR BUILD_TV)

else()
set(LLVM_UTIL_SRCS "")
set(BACKEND_TV_SRCS "")
endif()

if (BUILD_TV)
Expand Down Expand Up @@ -250,9 +265,10 @@ install(TARGETS alive alive-jobserver)
#add_library(alive2 SHARED ${IR_SRCS} ${SMT_SRCS} ${TOOLS_SRCS} ${UTIL_SRCS} ${LLVM_UTIL_SRCS})

if (BUILD_LLVM_UTILS OR BUILD_TV)
llvm_map_components_to_libnames(llvm_libs support core irreader bitwriter analysis passes transformutils)
# target_link_libraries(alive2 PRIVATE ${llvm_libs})
llvm_map_components_to_libnames(llvm_libs support core irreader bitwriter analysis passes transformutils asmparser asmprinter target mc mcparser mcdisassembler aarch64asmparser aarch64codegen aarch64desc aarch64disassembler aarch64info aarch64utils)
#target_link_libraries(alive2 PRIVATE ${llvm_libs})
target_link_libraries(alive-tv PRIVATE ${ALIVE_LIBS_LLVM} ${Z3_LIBRARIES} ${HIREDIS_LIBRARIES} ${llvm_libs})
target_link_libraries(backend-tv PRIVATE ${ALIVE_LIBS_LLVM} ${Z3_LIBRARIES} ${HIREDIS_LIBRARIES} ${llvm_libs})
target_link_libraries(quick-fuzz PRIVATE ${ALIVE_LIBS_LLVM} ${Z3_LIBRARIES} ${HIREDIS_LIBRARIES} ${llvm_libs})
target_link_libraries(alive-exec PRIVATE ${ALIVE_LIBS_LLVM} ${Z3_LIBRARIES} ${HIREDIS_LIBRARIES} ${llvm_libs})
install(TARGETS alive-tv quick-fuzz alive-exec)
Expand All @@ -278,5 +294,5 @@ add_custom_target("check"
)

if (BUILD_TV)
add_dependencies("check" "alive-tv" "quick-fuzz" "tv")
add_dependencies("check" "alive-tv" "backend-tv" "quick-fuzz" "tv")
endif()
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