drivers: clocks: sam0: Fix devicetree usage of GCLK and MCLK #82183
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Nov 30, 2024
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| GCLK->PCHCTRL[cfg->gclk_id].reg = GCLK_PCHCTRL_CHEN | ||
| | GCLK_PCHCTRL_GEN(cfg->gclk_gen) | ||
| ; |
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Formatting looks off here?
| @@ -9,7 +12,6 @@ toolchain: | |||
| flash: 256 | |||
| ram: 32 | |||
| supported: | |||
| - adc | |||
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Were these ADC changes meant to into this commit? If so, please add some details on why in the commit message.
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| assigned-clocks: | ||
| type: phandle-array | ||
| description: Assigned-clock information | ||
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| assigned-clock-names: | ||
| type: string-array | ||
| description: Name of each assigned-clock |
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The commit message says "already defined" properties - but these properties are new in Zephyr and not mentioned in the Devicetree Specification (v0.4).
I would like to hear @danieldegrasse opinion on the use of these and possible conflict with the upcoming clock controller rework.
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This looks similar to Linux clock DT description
Some platforms require special clock selection options. This could be made using the already defined assigned-clocks from Linux clocks. See https://github.com/devicetree-org/dt-schema/blob/93ee8008959e362548168eaa7bdc20c115f3d586/dtschema/schemas/clock/clock.yaml#L24 This introduces the assigned-clocks and assigned-clock-names properties to generalize those conditions in Zephyr. Signed-off-by: Gerson Fernando Budke <[email protected]>
The Atmel SAM0 SoC enable peripherals clocks in distinct places: PM and MCLK. The old devices had defined the peripheral clock enable bit at PM. On the newer devices this was extracted on a dedicated memory section called Master Clock (MCLK). This change excludes the dedicated bindings in favor of a generic approach that cover all cases. Now the clocks properties is complemented by the assigned-clocks property. It gives the liberty to user to customize the clock source from a generic clock or configure the direct connections. All peripherals drivers were reworked with the newer solution. In addition, some peripherals were set the default status to disabled. It is expected that developer will define at board the pinctrl and select the correct clock entry. When this is correct the peripheral should be at the board yaml in the supported list. Because of this a few boards exclude now some peripheral like adc. This avoid that CI will collect invalid board to run tests. Signed-off-by: Gerson Fernando Budke <[email protected]>
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Some platforms require special clock selection options. This could be made using the already defined assigned-clocks from Linux devicetree. This can be used on Atmel SAM0 SoC to enable peripherals clocks in distinct places like PM and MCLK. Old devices had defined the peripheral clock enable bit at PM. On the newer devices this was extracted on a dedicated memory section called Master Clock (MCLK). This change excludes the dedicated bindings in favor of a generic approach that cover all cases. It uses the assigned-clocks and assigned-clock-names properties to generalize those conditions.
With this, the clocks are very flexible now and this gives the liberty to developer to customize the clock source from a generic clock or configure the direct connections. The drivers that require those properties were reworked to use the new solution. Some drivers still access direct the properties and should be reworked in the future.
Note:
1- This changes is a step necessary to have proper clock drivers for these SoCs.
2- This was splitted from #81819 and should be merged first.