samples: disable shell for i.MX8QM and i.MX8QXP

[iuliana-prodan]

Disable shell for i.MX8QM and i.MX8QXP since is not supported now.

[arnopo]

Are you sure that the shell is not working?
I would expect that it is generic as the console is over rpmsg (CONFIG_SHELL_BACKEND_RPMSG=y).
with that the console should be accessible from your board Linux console

To check it:
In your board Linux console check that you have a "/dev/ttyRPMSG1"
then

:~# microcom /dev/ttyRPMSG1

tty:~$ kernel version
Zephyr version 3.7.0

[iuliana-prodan]

Are you sure that the shell is not working? I would expect that it is generic as the console is over rpmsg (CONFIG_SHELL_BACKEND_RPMSG=y). with that the console should be accessible from your board Linux console

To check it: In your board Linux console check that you have a "/dev/ttyRPMSG1" then

:~# microcom /dev/ttyRPMSG1

tty:~$ kernel version
Zephyr version 3.7.0

With the shell config the communication between cores is broken (the first message sent from Linux get's stuck) because it messes up with the interrupts - for these 2 targets the UART has interrupts enabled.

The SHELL was enabled for all targets, in prj.conf and I don't think this should be for all targets, I'm pretty sure was not tested on all supported boards. IMO should be set per board.

LE: I don't have time to debug this issue now, that's why I prefer to disable the SHELL for i.MX8QM and i.MX8QXP, for now.
I'll get back to it, when time allows.

[arnopo]

on between cores is broken (the first message sen

[arnopo]

Are you sure that the shell is not working? I would expect that it is generic as the console is over rpmsg (CONFIG_SHELL_BACKEND_RPMSG=y). with that the console should be accessible from your board Linux console
To check it: In your board Linux console check that you have a "/dev/ttyRPMSG1" then

:~# microcom /dev/ttyRPMSG1

tty:~$ kernel version
Zephyr version 3.7.0

With the shell config the communication between cores is broken (the first message sent from Linux get's stuck) because it messes up with the interrupts - for these 2 targets the UART has interrupts enabled.

The SHELL was enabled for all targets, in prj.conf and I don't think this should be for all targets, I'm pretty sure was not tested on all supported boards. IMO should be set per board.

LE: I don't have time to debug this issue now, that's why I prefer to disable the SHELL for i.MX8QM and i.MX8QXP, for now. I'll get back to it, when time allows.

Thanks for the clarification.
I'm not familiar with Zephyr process in such case, I let @doki-nordic and/or @carlocaione give advice on this (issue creation, commit message explaining more in detail limitation...)

[arnopo]

Sorry, I had closed it by mistake...

[iuliana-prodan]

@doki-nordic @carlocaione @arnopo can you, please, take a look?
Thanks!

[arnopo]

seems to me reasonable to have this patch as workaround.
The issue #79970 has been entered to address the point