Rt1170 Dual Core and OpenAMP support #41579
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Are there any news on this now that #40555 has been merged? |
Allow linking code into OCRAM region when building for RT1xxx SOCs. This can be used on the RT11xx dual core SOCs as a shared memory region, when the M7 core needs to load code into a region accessible to the M4 core. Signed-off-by: Daniel DeGrasse <[email protected]>
RT11xx features CM4 core, which must be booted from CM7 core. Add support for loading an image for the CM4 to RAM, and booting the CM4 core from this image. Each image is built independently using sysbuild, and the M4 image build produces built collateral with load address information the M7 image can use to load it to RAM Signed-off-by: Daniel DeGrasse <[email protected]>
RT1170 and RT1160 CM7 and CM4 cores have the same set of differences. Merge the DTS files for both CM4 and CM7 cores, to create generic rt11xx_cm4 and rt11xx_cm7 files. Signed-off-by: Daniel DeGrasse <[email protected]>
Enable MU messaging unit driver for RT11xx socs. Signed-off-by: Daniel DeGrasse <[email protected]>
Use the messaging unit to ensure that the RT11xx dual core mode will wait for the second core to boot successfully during early init Signed-off-by: Daniel DeGrasse <[email protected]>
Add zephyr,memory-region compatible and attribute to SOC memory regions, so that sections will be generated and MPU attributes can be applied. Signed-off-by: Daniel DeGrasse <[email protected]>
Flexspi partition definition is shared between both cm4 and cm7 core. Refactor it to be in shared dtsi file. This will ensure that both cores share the same partition information, for dual core operation. Signed-off-by: Daniel DeGrasse <[email protected]>
Add support for loading M4 image from OCRAM when running with dual core operation. The M7 core will copy the M4 image from flash into OCRAM, and the M4 core will execute it there. Signed-off-by: Daniel DeGrasse <[email protected]>
Enable messaging unit support for RT1170 EVK Signed-off-by: Daniel DeGrasse <[email protected]>
LED1 node is enabled, to provide a secondary led for the CM4 core. Signed-off-by: Daniel DeGrasse <[email protected]>
Enable the openamp sample for RT1170EVK. CM4 core has a custom DTS overlay to use LPUART2 for console information, and use a secondary GPT timer for the system tick. Signed-off-by: Daniel DeGrasse <[email protected]>
…port Update RT1170 documentation for dual core support Signed-off-by: Daniel DeGrasse <[email protected]>
Flexspi partition definition is shared between both cm4 and cm7 core. Refactor it to be in shared dtsi file. This will ensure that both cores share the same partition information, for dual core operation. Signed-off-by: Daniel DeGrasse <[email protected]>
Add support for loading M4 image from OCRAM when running with dual core operation. The M7 core will copy the M4 image from flash into OCRAM, and the M4 core will execute it there. Signed-off-by: Daniel DeGrasse <[email protected]>
Enable messaging unit support for RT1160 EVK Signed-off-by: Daniel DeGrasse <[email protected]>
Enable the openamp sample for RT1160EVK. CM4 core has a custom DTS overlay to use LPUART2 for console information, and use a secondary GPT timer for the system tick. Signed-off-by: Daniel DeGrasse <[email protected]>
…port Update rt1160 documentation for dual core support Signed-off-by: Daniel DeGrasse <[email protected]>
dleach02
approved these changes
Dec 5, 2022
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Enable dual core and shared memory support for the RT1170 EVK.
This PR enables the following features for the RT1170:
OCRAM2Mulitcore images are created by converting the secondary image binary into a elf file with one section, and linking that into the primary image. The primary core will load the secondary image from flash into RAM, then boot the secondary core from that RAM.Mulicore images are now supported using Sysbuild