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RFC: memory regions from devicetree & explicit code locations #33656

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RFC: memory regions from devicetree & explicit code locations #33656

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52b5311
cmake: boilerplate: add BOARD_LAYOUT parsing
Mar 22, 2021
cdfea7c
cmake: apply layout overlays and configuration
Mar 22, 2021
0279ba0
boards: nrf52840dk_nrf52840: convert to layouts
Mar 22, 2021
ba76b22
linker: macros for memory regions from devicetree
Jan 2, 2021
9f999e0
linker: arm: generate memory regions from dt
Mar 22, 2021
8ea65e8
linker: arm: simplify region definitions
Mar 22, 2021
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29 changes: 7 additions & 22 deletions include/arch/arm/aarch32/cortex_m/scripts/linker.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -13,14 +13,15 @@

#include <autoconf.h>
#include <linker/sections.h>
#include <linker/devicetree_regions.h>
#include <devicetree.h>

#include <linker/linker-defs.h>
#include <linker/linker-tool.h>

/* physical address of RAM */
#ifdef CONFIG_XIP
#define ROMABLE_REGION FLASH
#define ROMABLE_REGION DT_CODE_PARITION()
#define RAMABLE_REGION SRAM
#else
#define ROMABLE_REGION SRAM
Expand All @@ -33,25 +34,6 @@
#define _DATA_IN_ROM
#endif

#if !defined(CONFIG_XIP) && (CONFIG_FLASH_SIZE == 0)
#define ROM_ADDR RAM_ADDR
#else
#define ROM_ADDR (CONFIG_FLASH_BASE_ADDRESS + CONFIG_FLASH_LOAD_OFFSET)
#endif

#ifdef CONFIG_HAS_TI_CCFG
#define CCFG_SIZE 88
#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET - \
CCFG_SIZE)
#define CCFG_ADDR (ROM_ADDR + ROM_SIZE)
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CCFG_ADDR is still being used in the code below:

#ifdef CONFIG_HAS_TI_CCFG
    FLASH_CCFG            (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE
#endif

causing:

invalid origin for memory region FLASH_CCFG
collect2: error: ld returned 1 exit status
ninja: build stopped: subcommand failed.

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Seems to be corrected in: #34185
So assume this is now pending a rebase after #34185 is merged.

#else
#if CONFIG_FLASH_LOAD_SIZE > 0
#define ROM_SIZE CONFIG_FLASH_LOAD_SIZE
#else
#define ROM_SIZE (CONFIG_FLASH_SIZE*1K - CONFIG_FLASH_LOAD_OFFSET)
#endif
#endif

#if defined(CONFIG_XIP)
#if defined(CONFIG_IS_BOOTLOADER)
#define RAM_SIZE (CONFIG_BOOTLOADER_SRAM_SIZE * 1K)
Expand Down Expand Up @@ -106,7 +88,6 @@ _region_min_align = 4;

MEMORY
{
FLASH (rx) : ORIGIN = ROM_ADDR, LENGTH = ROM_SIZE
#ifdef CONFIG_HAS_TI_CCFG
FLASH_CCFG (rwx): ORIGIN = CCFG_ADDR, LENGTH = CCFG_SIZE
#endif
Expand Down Expand Up @@ -135,6 +116,10 @@ MEMORY
#ifdef CONFIG_STM32_BACKUP_SRAM
BACKUP_SRAM (rw) : ORIGIN = DT_REG_ADDR(DT_NODELABEL(backup_sram)), LENGTH = DT_REG_SIZE(DT_NODELABEL(backup_sram))
#endif

/* Add custom memory regions specified by devicetree partitions */
DT_REGIONS_FROM_CHOSEN_FLASH(zephyr_flash)

/* Used by and documented in include/linker/intlist.ld */
IDT_LIST (wx) : ORIGIN = (RAM_ADDR + RAM_SIZE), LENGTH = 2K
}
Expand Down Expand Up @@ -162,7 +147,7 @@ SECTIONS

GROUP_START(ROMABLE_REGION)

_image_rom_start = ROM_ADDR;
_image_rom_start = .;
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@tejlmand tejlmand Apr 12, 2021 •
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This is changing the value of _image_rom_start from a calculated address to 0x0.

This means that code that refers to _image_rom_start might get a wrong value.

This also results in:

zephyr/include/arch/arm/aarch32/cortex_m/scripts/linker.ld

Line 507 in 22a82bc

_flash_used = LOADADDR(.last_section) - _image_rom_start;

being calculated wrongly.

As example, building hello world for cc3235sf_launchxl with CONFIG_XIP=n on master gives me:

$ objdump -x zephyr/zephyr.elf |grep _image_rom_start
20000000 g       *ABS*  00000000 _image_rom_start
$ objdump -x build_xip_ref/zephyr/zephyr.elf |grep _flash_used
00004158 g       *ABS*  00000000 _flash_used

but with this PR:

$ objdump -x build_xip/zephyr/zephyr.elf |grep _image_rom_start
00000000 g       rom_start      00000000 _image_rom_start
$ objdump -x build_xip/zephyr/zephyr.elf |grep _flash_used
20004158 g       *ABS*  00000000 _flash_used

so any code relying on those two symbols will fail.


SECTION_PROLOGUE(rom_start,,)
{
Expand Down