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Fix various issues with CI job #20
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nashif
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Apr 30, 2017
- Run compliance tests
- Build Documentation and check for new warnings
- Post results to AWS S3 storage
Signed-off-by: Anas Nashif <[email protected]>
Signed-off-by: Anas Nashif <[email protected]>
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Signed-off-by: Anas Nashif <[email protected]>
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rsalveti
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May 3, 2017
The current implementation of stm32_gpio_set() uses the GPIO output data register to change the state of individual GPIOs. The generated assembler needs at least 3 instructions: load / modify / store. This opens a small race window, for example if a thread and an interrupt both try to change the state of the same GPIO bank. Use the GPIO bit set/reset register to perform the atomic change without locking. This also has the benefit of a more optimised implementation, which can be useful for GPIO-intensive work. Compare the new version: 08000c98 <stm32_gpio_set>: 8000c98: f001 010f and.w r1, r1, zephyrproject-rtos#15 8000c9c: 2301 movs r3, zephyrproject-rtos#1 8000c9e: b902 cbnz r2, 8000ca2 <stm32_gpio_set+0xa> 8000ca0: 3110 adds r1, zephyrproject-rtos#16 8000ca2: 408b lsls r3, r1 8000ca4: 6183 str r3, [r0, zephyrproject-rtos#24] 8000ca6: 2000 movs r0, #0 8000ca8: 4770 bx lr and the old one: 08000c98 <stm32_gpio_set>: 8000c98: 2301 movs r3, zephyrproject-rtos#1 8000c9a: f001 010f and.w r1, r1, zephyrproject-rtos#15 8000c9e: fa03 f101 lsl.w r1, r3, r1 8000ca2: 6943 ldr r3, [r0, zephyrproject-rtos#20] 8000ca4: b10a cbz r2, 8000caa <stm32_gpio_set+0x12> 8000ca6: 4319 orrs r1, r3 8000ca8: e001 b.n 8000cae <stm32_gpio_set+0x16> 8000caa: ea23 0101 bic.w r1, r3, r1 8000cae: 6141 str r1, [r0, zephyrproject-rtos#20] 8000cb0: 2000 movs r0, #0 8000cb2: 4770 bx lr Change-Id: Ie5800d1c345016028d1b9a099f5d74cac35f592a Signed-off-by: Florian Vaussard <[email protected]>
frasa
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Mar 25, 2019
* Adds a default configuration of the SPI Flash SPI clock which is 500000. Closes zephyrproject-rtos#20
frasa
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Mar 25, 2019
Fix: Flash default spi clock Closes zephyrproject-rtos#20 See merge request blik/embedded/zephyr!29
carlescufi
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Apr 30, 2020
Certain Qualcomm controllers do not accept our settings for Host Buffer Size: < HCI Command: Host Buffer Size (0x03|0x0033) plen 7 zephyrproject-rtos#19 [hci0] 22.391048 ACL MTU: 27 ACL max packet: 6 SCO MTU: 0 SCO max packet: 0 > HCI Event: Command Complete (0x0e) plen 4 zephyrproject-rtos#20 [hci0] 22.391525 Host Buffer Size (0x03|0x0033) ncmd 1 Status: Invalid HCI Command Parameters (0x12) Likely due to the fact that we do not reserve space for any SCO packets in the Host. Other Controllers (Realtek) seem to not transmit any data at all in the Controller to Host direction if Controller to Host flow control is enabled. Document this fact in the User Guide so that users know what to do when this happens. Signed-off-by: Carles Cufi <[email protected]>
jhedberg
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Apr 30, 2020
Certain Qualcomm controllers do not accept our settings for Host Buffer Size: < HCI Command: Host Buffer Size (0x03|0x0033) plen 7 #19 [hci0] 22.391048 ACL MTU: 27 ACL max packet: 6 SCO MTU: 0 SCO max packet: 0 > HCI Event: Command Complete (0x0e) plen 4 #20 [hci0] 22.391525 Host Buffer Size (0x03|0x0033) ncmd 1 Status: Invalid HCI Command Parameters (0x12) Likely due to the fact that we do not reserve space for any SCO packets in the Host. Other Controllers (Realtek) seem to not transmit any data at all in the Controller to Host direction if Controller to Host flow control is enabled. Document this fact in the User Guide so that users know what to do when this happens. Signed-off-by: Carles Cufi <[email protected]>
hakehuang
referenced
this pull request
in hakehuang/zephyr
Jun 20, 2020
Certain Qualcomm controllers do not accept our settings for Host Buffer Size: < HCI Command: Host Buffer Size (0x03|0x0033) plen 7 #19 [hci0] 22.391048 ACL MTU: 27 ACL max packet: 6 SCO MTU: 0 SCO max packet: 0 > HCI Event: Command Complete (0x0e) plen 4 #20 [hci0] 22.391525 Host Buffer Size (0x03|0x0033) ncmd 1 Status: Invalid HCI Command Parameters (0x12) Likely due to the fact that we do not reserve space for any SCO packets in the Host. Other Controllers (Realtek) seem to not transmit any data at all in the Controller to Host direction if Controller to Host flow control is enabled. Document this fact in the User Guide so that users know what to do when this happens. Signed-off-by: Carles Cufi <[email protected]>
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cdesjardins
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to Arch-Embedded/zephyr
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Oct 22, 2024
Make the fatfs use the RTC Approved-by: Fabian van den IJssel
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