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Add GPIO_ACCESS_BY_PORT_MASK mode #10741

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Add GPIO_ACCESS_BY_PORT_MASK mode #10741

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2d5f446
gpio: Add ACCESS_BY_PORT_MASK mode
qianfan-Zhao Oct 21, 2018
84d58ca
gpio: Modify the param 'pin' to 0xFFFFFFFF when accessed by port
qianfan-Zhao Oct 21, 2018
6180703
drivers: gpio_sam: Add GPIO_ACCESS_BY_PORT_MASK mode support
qianfan-Zhao Oct 21, 2018
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21 changes: 14 additions & 7 deletions drivers/gpio/gpio_sam.c
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Original file line number Diff line number Diff line change
Expand Up @@ -118,11 +118,15 @@ static int gpio_sam_config(struct device *dev, int access_op, u32_t pin,
case GPIO_ACCESS_BY_PIN:
gpio_sam_config_pin(pio, BIT(pin), flags);
break;
case GPIO_ACCESS_BY_PORT_MASK:
case GPIO_ACCESS_BY_PORT:
for (i = 0; i < 32; i++) {
result = gpio_sam_config_pin(pio, BIT(i), flags);
if (result < 0) {
return result;
if (pin & BIT(i)) {
result = gpio_sam_config_pin(pio, BIT(i),
flags);
if (result < 0) {
return result;
}
}
}
break;
Expand All @@ -138,20 +142,23 @@ static int gpio_sam_write(struct device *dev, int access_op, u32_t pin,
{
const struct gpio_sam_config * const cfg = DEV_CFG(dev);
Pio *const pio = cfg->regs;
u32_t mask = 1 << pin;
u32_t write_mask;

switch (access_op) {
case GPIO_ACCESS_BY_PIN:
if (value) {
/* Set the pin. */
pio->PIO_SODR = mask;
pio->PIO_SODR = (1 << pin);
} else {
/* Clear the pin. */
pio->PIO_CODR = mask;
pio->PIO_CODR = (1 << pin);
}
break;
case GPIO_ACCESS_BY_PORT_MASK:
case GPIO_ACCESS_BY_PORT:
pio->PIO_OWER = pio->PIO_OSR; /* Write those out pin only */
/* Write those output pin and which masked in 'pin' only */
write_mask = pio->PIO_OSR & pin;
pio->PIO_OWER = write_mask;
pio->PIO_ODSR = value;
pio->PIO_OWDR = 0xffffffff; /* Disable write ODSR */
break;
Expand Down
56 changes: 51 additions & 5 deletions include/gpio.h
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Original file line number Diff line number Diff line change
Expand Up @@ -35,6 +35,7 @@ extern "C" {
/** @cond INTERNAL_HIDDEN */
#define GPIO_ACCESS_BY_PIN 0
#define GPIO_ACCESS_BY_PORT 1
#define GPIO_ACCESS_BY_PORT_MASK 2
/**
* @endcond
*/
Expand Down Expand Up @@ -321,7 +322,7 @@ static inline int gpio_pin_disable_callback(struct device *port, u32_t pin)
*/
static inline int gpio_port_configure(struct device *port, int flags)
{
return gpio_config(port, GPIO_ACCESS_BY_PORT, 0, flags);
return gpio_config(port, GPIO_ACCESS_BY_PORT, 0xFFFFFFFF, flags);
}

/**
Expand All @@ -339,7 +340,7 @@ static inline int gpio_port_configure(struct device *port, int flags)
*/
static inline int gpio_port_write(struct device *port, u32_t value)
{
return gpio_write(port, GPIO_ACCESS_BY_PORT, 0, value);
return gpio_write(port, GPIO_ACCESS_BY_PORT, 0xFFFFFFFF, value);
}

/**
Expand All @@ -357,7 +358,7 @@ static inline int gpio_port_write(struct device *port, u32_t value)
*/
static inline int gpio_port_read(struct device *port, u32_t *value)
{
return gpio_read(port, GPIO_ACCESS_BY_PORT, 0, value);
return gpio_read(port, GPIO_ACCESS_BY_PORT, 0xFFFFFFFF, value);
}

/**
Expand All @@ -372,7 +373,7 @@ static inline int gpio_port_read(struct device *port, u32_t *value)
*/
static inline int gpio_port_enable_callback(struct device *port)
{
return gpio_enable_callback(port, GPIO_ACCESS_BY_PORT, 0);
return gpio_enable_callback(port, GPIO_ACCESS_BY_PORT, 0xFFFFFFFF);
}

/**
Expand All @@ -382,7 +383,52 @@ static inline int gpio_port_enable_callback(struct device *port)
*/
static inline int gpio_port_disable_callback(struct device *port)
{
return gpio_disable_callback(port, GPIO_ACCESS_BY_PORT, 0);
return gpio_disable_callback(port, GPIO_ACCESS_BY_PORT, 0xFFFFFFFF);
}

/**
* @brief Configure all the masked pins the same way in the port.
*
* Only configure the pins that are enabled by the mask.
*
* The state of each pin is
* represented by one bit in the flags. Pin 0 corresponds to the
* least significant bit, pin 31 corresponds to the most significant
* bit. For ports with less that 32 physical pins the most significant
* bits which do not correspond to a physical pin are ignored.
*
* @param port Pointer to the device structure for the driver instance.
* @param mask Mask.
* @param flags Flags to configure the port.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_port_configure_masked(struct device *port,
u32_t mask, int flags)
{
return gpio_config(port, GPIO_ACCESS_BY_PORT_MASK, mask, flags);
}

/**
* @brief Write a data value to the port.
*
* Write the output state of a port. Only write the state to the pins
* that are enabled by the mask.
*
* The state of each pin is
* represented by one bit in the value. Pin 0 corresponds to the
* least significant bit, pin 31 corresponds to the most significant
* bit. For ports with less that 32 physical pins the most significant
* bits which do not correspond to a physical pin are ignored.
*
* @param port Pointer to the device structure for the driver instance.
* @param mask Mask.
* @param value Value to set on the port.
* @return 0 if successful, negative errno code on failure.
*/
static inline int gpio_port_write_masked(struct device *port,
u32_t mask, u32_t value)
{
return gpio_write(port, GPIO_ACCESS_BY_PORT_MASK, mask, value);
}

/**
Expand Down