zephyr-master_fork

arch/arm/Makefile

@@ -14,7 +14,8 @@ cflags-cortex-m3 = $(call cc-option,-mabi=aapcs -mthumb -mcpu=cortex-m3) \
 			$(call cc-option,-mthumb -march=armv7-m)
 cflags-cortex-m4 = $(call cc-option,-mabi=aapcs -mthumb -mcpu=cortex-m4) \
 			$(call cc-option,-mthumb -march=armv7e-m)
-cflags-cortex-m7 = $(call cc-option,-mabi=aapcs -mthumb -mcpu=cortex-m7)
+cflags-cortex-m7 = $(call cc-option,-mabi=aapcs -mthumb-mcpu=cortex-m7) \
+			 $(call cc-option,-mthumb -march=armv7-m)
 
 ifeq ($(CONFIG_FLOAT), y)
 ifeq ($(CONFIG_FP_SOFTABI), y)

arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.series

@@ -0,0 +1,96 @@
+# Kconfig.defconfig.eries - ST Microelectronics STM32F7 MCU linue
+#
+# Copyright (c) 2016 Linaro Limited
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if SOC_SERIES_STM32F7X
+
+source "arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.stm32f7*"
+
+config SOC_SERIES
+	default stm32f7
+
+config NUM_IRQ_PRIO_BITS
+	int
+	default 4
+
+config SERIAL
+	def_bool y
+
+if SERIAL
+
+config CONSOLE
+	def_bool y
+
+config UART_CONSOLE
+	def_bool y
+
+config UART_CONSOLE_ON_DEV_NAME
+	default UART_1 if BOARD_DISCOVERY_STM32F7
+
+config UART_STM32
+	def_bool y
+
+config UART_STM32_PORT_0
+	def_bool y
+
+config UART_STM32_PORT_0_NAME
+	default UART_0
+
+config UART_STM32_PORT_0_BAUD_RATE
+	default 115200
+
+config UART_STM32_PORT_1
+	def_bool y
+
+config UART_STM32_PORT_1_NAME
+	default UART_1
+
+config UART_STM32_PORT_1_BAUD_RATE
+	default 115200
+
+endif #SERIAL
+
+if CLOCK_CONTROL
+
+config CLOCK_CONTROL_STM32F7X
+	def_bool y
+
+endif #CLOCK_CONTROL
+
+if GPIO
+
+config GPIO_STM32
+	def_bool y
+
+config GPIO_STM32_PORTA
+	def_bool y
+
+config GPIO_STM32_PORTB
+	def_bool y
+
+config GPIO_STM32_PORTC
+	def_bool y
+
+endif #GPIO
+
+if PINMUX
+
+config PINMUX_STM32
+	def_bool y
+
+endif #PINMUX
+
+endif # SOC_SERIES_STM32F7X

arch/arm/soc/st_stm32/stm32f7/Kconfig.defconfig.stm32f7xx

@@ -0,0 +1,34 @@
+# Kconfig - ST STM32F401RE MCU configuration options
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+if SOC_STM32F7XX
+
+config SOC
+	string
+	default stm32f7xx
+
+config SRAM_SIZE
+	default 256 
+
+config FLASH_SIZE
+	default 1024
+
+config NUM_IRQS
+	int
+	default 85
+
+endif # SOC_STM32F401RE

arch/arm/soc/st_stm32/stm32f7/Kconfig.series

@@ -0,0 +1,25 @@
+# Kconfig - ST Microelectronics STM32F1 MCU series
+#
+# Copyright (c) 2016 Linaro Limited
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+config SOC_SERIES_STM32F7X
+	bool "STM32F7x Series MCU"
+	select CPU_CORTEX_M
+	select CPU_CORTEX_M7
+	select SOC_FAMILY_STM32
+	select SYS_POWER_LOW_POWER_STATE_SUPPORTED
+	help
+	 Enable support for STM32F7 MCU series

arch/arm/soc/st_stm32/stm32f7/Kconfig.soc

@@ -0,0 +1,25 @@
+# Kconfig.soc - ST Microelectronics STM32F4 MCU line
+#
+# Copyright (c) 2016 Linaro Limited.
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+#     http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+# See the License for the specific language governing permissions and
+# limitations under the License.
+#
+
+choice
+prompt "STM32F7x MCU Selection"
+depends on SOC_SERIES_STM32F7X
+
+config SOC_STM32F7XX
+	bool "STM32F76xxx"
+
+endchoice

arch/arm/soc/st_stm32/stm32f7/Makefile

@@ -0,0 +1,7 @@
+obj-y += soc.o
+
+obj-$(CONFIG_GPIO) += soc_gpio.o
+obj-$(CONFIG_PINMUX) += soc_pinmux.o
+
+zephyr: $(KERNEL_HEX_NAME)
+all: $(KERNEL_HEX_NAME)

arch/arm/soc/st_stm32/stm32f7/flash_registers.h

@@ -0,0 +1,90 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _STM32F4X_FLASH_REGISTERS_H_
+#define _STM32F4X_FLASH_REGISTERS_H_
+
+/**
+ * @brief
+ *
+ * Based on reference manual:
+ *
+ * Chapter 3.4: Embedded Flash Memory
+ */
+
+enum {
+	STM32F7X_FLASH_LATENCY_0 = 0x0,
+	STM32F7X_FLASH_LATENCY_1 = 0x1,
+	STM32F7X_FLASH_LATENCY_2 = 0x2,
+	STM32F7X_FLASH_LATENCY_3 = 0x3,
+	STM32F7X_FLASH_LATENCY_4 = 0x4,
+	STM32F7X_FLASH_LATENCY_5 = 0x5,
+	STM32F7X_FLASH_LATENCY_6 = 0x6,
+	STM32F7X_FLASH_LATENCY_7 = 0x7,
+	STM32F7X_FLASH_LATENCY_8 = 0x8,
+	STM32F7X_FLASH_LATENCY_9 = 0x9,
+};
+
+union __flash_acr {
+	uint32_t val;
+	struct {
+		uint32_t latency :4 __packed;
+		uint32_t rsvd__4_7 :4 __packed;
+		uint32_t prften :1 __packed;
+		uint32_t arten :1 __packed;
+		uint32_t rsvd__10 :1 __packed;
+		uint32_t artrst :1 __packed;
+		uint32_t rsvd__12_31 :20 __packed;
+	} bit;
+};
+
+/* 3.7 Embedded flash registers */
+struct stm32f7x_flash {
+	union __flash_acr acr;
+	uint32_t key;
+	uint32_t optkey;
+	volatile uint32_t status;
+	volatile uint32_t ctrl;
+	uint32_t optctrl;
+	uint32_t optctrl1;
+
+};
+
+/**
+ * @brief setup embedded flash controller
+ *
+ * Configure flash access time latency depending on SYSCLK.
+ */
+static inline void __setup_flash(void)
+{
+	volatile struct stm32f7x_flash *regs;
+	uint32_t tmpreg = 0;
+
+	regs = (struct stm32f7x_flash *) FLASH_R_BASE;
+
+	if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 30000000) {
+		regs->acr.bit.latency = STM32F7X_FLASH_LATENCY_0;
+	} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 60000000) {
+		regs->acr.bit.latency = STM32F7X_FLASH_LATENCY_1;
+	} else if (CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC <= 90000000) {
+		regs->acr.bit.latency = STM32F7X_FLASH_LATENCY_2;
+	}
+
+	/* Make sure latency was set */
+	tmpreg = regs->acr.bit.latency;
+}
+
+#endif	/* _STM32F7X_FLASHREGISTERS_H_ */

arch/arm/soc/st_stm32/stm32f7/gpio_registers.h

@@ -0,0 +1,64 @@
+/*
+ * Copyright (c) 2016 Linaro Limited.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef _STM32F7X_GPIO_REGISTERS_H_
+#define _STM32F7X_GPIO_REGISTERS_H_
+
+/**
+ * @brief Driver for GPIO of STM32F4X family processor.
+ *
+ * Based on reference manual:
+ *   RM0410 Reference manual STM32F7XXX
+ *   advanced ARM ® -based 32-bit MCUs
+ *
+ * Chapter 6: General-purpose I/Os (GPIOs)
+ */
+
+/* 6.4 GPIO registers - each GPIO port controls 16 pins */
+struct stm32f7x_gpio {
+	uint32_t mode;
+	uint32_t otype;
+	uint32_t ospeed;
+	uint32_t pupdr;
+	uint32_t idr;
+	uint32_t odr;
+	uint32_t bsr;
+	uint32_t lck;
+	uint32_t afr[2];
+	uint32_t afrh[2];
+};
+
+union syscfg_exticr {
+	uint32_t val;
+	struct {
+		uint16_t rsvd__16_31;
+		uint16_t exti;
+	} bit;
+};
+
+/* 7.2 SYSCFG registers */
+struct stm32f7x_syscfg {
+	uint32_t memrmp;
+	uint32_t pmc;
+	union syscfg_exticr exticr1;
+	union syscfg_exticr exticr2;
+	union syscfg_exticr exticr3;
+	union syscfg_exticr exticr4;
+	uint32_t cbr;
+	uint32_t cmpcr;
+};
+
+#endif /* _STM32F7X_GPIO_REGISTERS_H_ */

arch/arm/soc/st_stm32/stm32f7/linker.ld

@@ -0,0 +1,19 @@
+/* linker.ld - Linker command/script file */
+
+/*
+ * Copyright (c) 2014-2016 Wind River Systems, Inc.
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include <arch/arm/cortex_m/scripts/linker.ld>