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ENET2 Module not being clocked on MIMXRT1062_FMURT6 #59010

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sumitbatra-nxp opened this issue Jun 7, 2023 · 0 comments · Fixed by #58047
Closed

ENET2 Module not being clocked on MIMXRT1062_FMURT6 #59010

sumitbatra-nxp opened this issue Jun 7, 2023 · 0 comments · Fixed by #58047
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@dleach02
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bug The issue is a bug, or the PR is fixing a bug platform: NXP NXP priority: low Low impact/importance bug

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@sumitbatra-nxp
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Issue Description
50MHz Ref clock was not getting generated for ENET2 module.
Direction of the clock was from PHY to MAC

To Reproduce
Steps to reproduce the behavior:

  1. west build -p always -b mimxrt1062_fmurt6 samples/net/eth_native_posix/
  2. west flash
  3. Carrier is always down, LINK LED is not up when connected to compatible link partner

Expected behavior
Carrier Up, IP and MAC configured for the ethernet interface, Orange Link LED should be lighted up.

Fix
Fix the sequence of Enet2 ref clk enablement -

  1. Set ENET2 ref clock to be generated by External OSC - Setting Bits - Collection of changes from gerrit #14 ENET2_CLK_SEL in register IOMUXC_GPR_GPR1 (0x400A_C004)
  2. ENET2 ref clock direction as output - Set bit doc: remove :orphan: from README.rst #18 - ENET2_TX_CLK_DIR in register IOMUXC_GPR_GPR1 (0x400A_C004)
  3. Set ENET2 ref clk frequency to 50MHz - Setting 01 to Bit 2 and 3 of 0x400D_80E0 (CCM_ANALOG_PLL_ENET)
@sumitbatra-nxp sumitbatra-nxp added the bug The issue is a bug, or the PR is fixing a bug label Jun 7, 2023
sumitbatra-nxp added a commit to NXPHoverGames/zephyr that referenced this issue Jun 7, 2023
@sumitbatra-nxp
board: MIMXRT1062-FMURT6: Fix the sequence of Enet2 ref clk enablement
6ac7993 
This patch fixes zephyrproject-rtos#59010

This patch sets ENET2 ref clock to be generated by External OSC

ENET2 ref clock direction as output

ENET2 ref clk frequency to 50MHz

Signed-off-by: Sumit Batra <[email protected]>
@sumitbatra-nxp sumitbatra-nxp mentioned this issue Jun 7, 2023
Merged
@jgl-meta jgl-meta added the priority: low Low impact/importance bug label Jun 13, 2023
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@dleach02 dleach02

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bug The issue is a bug, or the PR is fixing a bug platform: NXP NXP priority: low Low impact/importance bug
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@henrikbrixandersen @dleach02 @sumitbatra-nxp @jgl-meta