drivers: entropy: Clock activation is missing on stm32l4

On STM32L4 SoCs RNG is clocked by 48MHz domain.
Hence, besides clock activation, it requires 48M
domain to be enabled.

Tested on:
*nucleo_l476rg
*stm32l476g_disco
*disco_l475_iot1

Signed-off-by: Erwan Gouriou <[email protected]>

drivers/entropy/entropy_stm32.c

@@ -152,6 +152,29 @@ static int entropy_stm32_rng_init(struct device *dev)
 	__ASSERT_NO_MSG(dev_data != NULL);
 	__ASSERT_NO_MSG(dev_cfg != NULL);
 
+#if CONFIG_SOC_SERIES_STM32L4X
+	/* Configure PLLSA11 to enable 48M domain */
+	LL_RCC_PLLSAI1_ConfigDomain_48M(LL_RCC_PLLSOURCE_MSI,
+					LL_RCC_PLLM_DIV_1,
+					24, LL_RCC_PLLSAI1Q_DIV_2);
+
+	/* Enable PLLSA1 */
+	LL_RCC_PLLSAI1_Enable();
+
+	/*  Enable PLLSAI1 output mapped on 48MHz domain clock */
+	LL_RCC_PLLSAI1_EnableDomain_48M();
+
+	/* Wait for PLLSA1 ready flag */
+	while (LL_RCC_PLLSAI1_IsReady() != 1) {
+	}
+
+	/*  Write the peripherals independent clock configuration register :
+	 *  choose PLLSAI1 source as the 48 MHz clock is needed for the RNG
+	 *  Linear Feedback Shift Register
+	 */
+	 LL_RCC_SetRNGClockSource(LL_RCC_RNG_CLKSOURCE_PLLSAI1);
+#endif /* CONFIG_SOC_SERIES_STM32L4X */
+
 	dev_data->clock = device_get_binding(STM32_CLOCK_CONTROL_NAME);
 	__ASSERT_NO_MSG(dev_data->clock != NULL);