boards: add support for nucleo_f429zi

Signed-off-by: Erwan Gouriou <[email protected]>

boards/arm/nucleo_f429zi/CMakeLists.txt

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+zephyr_library()
+zephyr_library_sources(pinmux.c)
+zephyr_library_include_directories(${PROJECT_SOURCE_DIR}/drivers)

boards/arm/nucleo_f429zi/Kconfig.board

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+# Kconfig - NUCLEO-144 F429ZI  board configuration
+#
+# Copyright (c) 2017 Linaro Limited
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+config BOARD_NUCLEO_F429ZI
+	bool "NUCLEO-144 F429ZI  Development Board"
+	depends on SOC_STM32F429XI

boards/arm/nucleo_f429zi/Kconfig.defconfig

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+# Kconfig - NUCLEO-144 F429ZI  board configuration
+#
+# Copyright (c) 2017 Linaro Limited
+#
+# SPDX-License-Identifier: Apache-2.0
+#
+
+if BOARD_NUCLEO_F429ZI
+
+config BOARD
+	default nucleo_f429zi
+
+if GPIO
+
+config GPIO_STM32_PORTG
+	def_bool y
+
+endif # GPIO
+
+if NETWORKING
+
+config NET_L2_ETHERNET
+	def_bool y
+
+endif # NETWORKING
+
+endif # BOARD_NUCLEO_F429ZI

boards/arm/nucleo_f429zi/board.cmake

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+include($ENV{ZEPHYR_BASE}/boards/common/openocd.board.cmake)

boards/arm/nucleo_f429zi/board.h

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+/*
+ *
+ * Copyright (c) 2017 Linaro Limited.
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+#ifndef __INC_BOARD_H
+#define __INC_BOARD_H
+
+#include <soc.h>
+
+/* USER push button */
+#define USER_PB_GPIO_PORT	"GPIOC"
+#define USER_PB_GPIO_PIN	13
+
+/* LD1 green LED */
+#define LD1_GPIO_PORT		"GPIOB"
+#define LD1_GPIO_PIN		0
+
+/* LD2 blue LED */
+#define LD2_GPIO_PORT		"GPIOB"
+#define LD2_GPIO_PIN		7
+
+/* LD3 red LED */
+#define LD3_GPIO_PORT		"GPIOB"
+#define LD3_GPIO_PIN		14
+
+/* Create aliases to make the basic samples work */
+#define SW0_GPIO_NAME		USER_PB_GPIO_PORT
+#define SW0_GPIO_PIN		USER_PB_GPIO_PIN
+#define LED0_GPIO_PORT		LD1_GPIO_PORT
+#define LED0_GPIO_PIN		LD1_GPIO_PIN
+
+#endif /* __INC_BOARD_H */

boards/arm/nucleo_f429zi/doc/nucleof429zi.rst

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+.. _nucleo_f429zi_board:
+
+ST Nucleo F429ZI
+################
+
+Overview
+********
+
+The Nucleo F429ZI board features an ARM Cortex-M4 based STM32F429ZI MCU
+with a wide range of connectivity support and configurations. Here are
+some highlights of the Nucleo F429ZI board:
+
+
+- STM32 microcontroller in LQFP144 package
+- LSE crystal: 32.768 kHz crystal oscillator
+- USB OTG
+- Ethernet compliant with IEEE-802.3-2002
+- Two types of extension resources:
+
+       - ST Zio connector including: support for Arduino* Uno V3 connectivity
+         (A0 to A5, D0 to D15) and additional signals exposing a wide range of
+         peripherals
+       - ST morpho extension pin headers for full access to all STM32 I/Os
+- On-board ST-LINK/V2-1 debugger/programmer with SWD connector
+- Flexible board power supply:
+
+       - 5 V from ST-LINK/V2-1 USB VBUS
+       - External power sources: 3.3 V and 7 - 12 V on ST Zio or ST morpho
+         connectors, 5 V on ST morpho connector
+- Three user LEDs
+- Two push-buttons: USER and RESET
+
+.. image:: img/Nucleo144_perf_logo_1024.png
+     :width: 720px
+     :align: center
+     :height: 720px
+     :alt: Nucleo F429ZI
+
+More information about the board can be found at the `Nucleo F429ZI website`_.
+
+Hardware
+********
+
+The Nucleo F429ZI provides the following hardware components:
+
+- STM32F429ZIT6 in LQFP144 package
+- ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU
+- 180 MHz max CPU frequency
+- VDD from 1.8 V to 3.6 V
+- 2 MB Flash
+- 256+4 KB SRAM including 64-Kbyte of core coupled memory
+- GPIO with external interrupt capability
+- 3x12-bit ADC with 24 channels
+- 2x12-bit D/A converters
+- RTC
+- Advanced-control Timer
+- General Purpose Timers (17)
+- Watchdog Timers (2)
+- USART/UART (4/4)
+- I2C (3)
+- SPI (6)
+- SDIO
+- 2xCAN
+- USB 2.0 OTG FS with on-chip PHY
+- USB 2.0 OTG HS/FS with dedicated DMA, on-chip full-speed PHY and ULPI
+- 10/100 Ethernet MAC with dedicated DMA
+- 8- to 14-bit parallel camera
+- CRC calculation unit
+- True random number generator
+- DMA Controller
+
+More information about STM32F429ZI can be found here:
+       - `STM32F429ZI on www.st.com`_
+       - `STM32F429 reference manual`_
+       - `STM32F429 datasheet`_
+
+Supported Features
+==================
+
+The Zephyr nucleo_f249zi board configuration supports the following hardware features:
+
++-----------+------------+-------------------------------------+
+| Interface | Controller | Driver/Component                    |
++===========+============+=====================================+
+| NVIC      | on-chip    | nested vector interrupt controller  |
++-----------+------------+-------------------------------------+
+| UART      | on-chip    | serial port-polling;                |
+|           |            | serial port-interrupt               |
++-----------+------------+-------------------------------------+
+| PINMUX    | on-chip    | pinmux                              |
++-----------+------------+-------------------------------------+
+| GPIO      | on-chip    | gpio                                |
++-----------+------------+-------------------------------------+
+| ETHERNET  | on-chip    | Ethernet                            |
++-----------+------------+-------------------------------------+
+| PWM       | on-chip    | pwm                                 |
++-----------+------------+-------------------------------------+
+
+
+Other hardware features are not yet supported on this Zephyr port.
+
+The default configuration can be found in the defconfig file:
+
+	``boards/arm/nucleo_f429zi/nucleo_f429zi_defconfig``
+
+
+Connections and IOs
+===================
+
+The Nucleo F429ZI Board has 8 GPIO controllers. These controllers are responsible for pin muxing,
+input/output, pull-up, etc.
+
+Available pins:
+---------------
+.. image:: img/nucleo_f429zi_cn8.png
+     :width: 720px
+     :align: center
+     :height: 540px
+     :alt: Nucleo F429ZI ZIO connectors (left)
+.. image:: img/nucleo_f429zi_cn7.png
+     :width: 720px
+     :align: center
+     :height: 540px
+     :alt: Nucleo F429ZI ZIO connectors (right)
+.. image:: img/nucleo_f429zi_cn11.png
+     :width: 720px
+     :align: center
+     :height: 540px
+     :alt: Nucleo F429ZI Morpho connectors (left)
+.. image:: img/nucleo_f429zi_cn12.png
+     :width: 720px
+     :align: center
+     :height: 540px
+     :alt: Nucleo F429ZI Morpho connectors (right)
+
+For mode details please refer to `STM32 Nucleo-144 board User Manual`_.
+
+Default Zephyr Peripheral Mapping:
+----------------------------------
+
+- UART_3_TX : PD8
+- UART_3_RX : PD9
+- PWM_2_CH1 : PA0
+- USER_PB : PC13
+- LD1 : PB0
+- LD2 : PB7
+- LD3 : PB14
+
+System Clock
+------------
+
+The Nucleo F429ZI System Clock could be driven by an internal or external oscillator,
+as well as by the main PLL clock. By default System clock is driven by PLL clock at 180MHz,
+driven by an 8MHz high speed external clock.
+
+Serial Port
+-----------
+
+The Nucleo F429ZI board has 8 UARTs. The Zephyr console output is assigned to UART3.
+Default settings are 115200 8N1.
+
+
+Programming and Debugging
+*************************
+
+The Nucleo F429ZI board includes an ST-LINK/V2-1 embedded debug tool interface.
+However this interface is currently not supported by OpenOCD. You will need
+to use ST tools or an external JTAG probe.
+
+
+.. _Nucleo F429ZI website:
+   http://www.st.com/en/evaluation-tools/nucleo-f429zi.html
+
+.. _STM32 Nucleo-144 board User Manual:
+   http://www.st.com/resource/en/user_manual/dm00244518.pdf
+
+.. _STM32F429ZI on www.st.com:
+   http://www.st.com/en/microcontrollers/stm32f429zi.html
+
+.. _STM32F429 reference manual:
+   http://www.st.com/resource/en/reference_manual/dm00031020.pdf
+
+.. _STM32F429 datasheet:
+   http://www.st.com/resource/en/datasheet/DM00071990.pdf

boards/arm/nucleo_f429zi/dts.fixup

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+/* This file is a temporary workaround for mapping of the generated information
+ * to the current driver definitions.  This will be removed when the drivers
+ * are modified to handle the generated information, or the mapping of
+ * generated data matches the driver definitions.
+ */
+
+
+#define CONFIG_NUM_IRQ_PRIO_BITS	ARM_V7M_NVIC_E000E100_ARM_NUM_IRQ_PRIORITY_BITS
+
+#define CONFIG_UART_STM32_PORT_3_BASE_ADDRESS	ST_STM32_USART_40004800_BASE_ADDRESS
+#define CONFIG_UART_STM32_PORT_3_BAUD_RATE	ST_STM32_USART_40004800_CURRENT_SPEED
+#define CONFIG_UART_STM32_PORT_3_IRQ_PRI	ST_STM32_USART_40004800_IRQ_0_PRIORITY
+#define CONFIG_UART_STM32_PORT_3_NAME		ST_STM32_USART_40004800_LABEL
+#define PORT_3_IRQ				ST_STM32_USART_40004800_IRQ_0

boards/arm/nucleo_f429zi/nucleo_f429zi.dts

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+/*
+ * Copyright (c) 2017 Linaro Limited
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ */
+
+/dts-v1/;
+#include <st/stm32f429.dtsi>
+
+/ {
+	model = "STMicroelectronics STM32F429ZI -NUCLEO board";
+	compatible = "st,stm32f429zi-nucleo", "st,stm32f429";
+
+	chosen {
+		zephyr,console = &usart3;
+		zephyr,sram = &sram0;
+		zephyr,flash = &flash0;
+	};
+};
+
+&usart3 {
+	current-speed = <115200>;
+	pinctrl-0 = <&usart3_pins_b>;
+	pinctrl-names = "default";
+	status = "ok";
+};

boards/arm/nucleo_f429zi/nucleo_f429zi.yaml

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+identifier: nucleo_f429zi
+name: NUCLEO-F429ZI
+type: mcu
+arch: arm
+toolchain:
+  - zephyr
+  - gccarmemb

boards/arm/nucleo_f429zi/nucleo_f429zi_defconfig

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+CONFIG_ARM=y
+CONFIG_BOARD_NUCLEO_F429ZI =y
+CONFIG_SOC_SERIES_STM32F4X=y
+CONFIG_SOC_STM32F429XI=y
+# 180MHz system clock
+CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=180000000
+CONFIG_SYS_CLOCK_TICKS_PER_SEC=1000
+
+# Enable MPU
+CONFIG_STM32_ARM_MPU_ENABLE=y
+
+# enable USART2 - passthrough to STLINK v2 connector
+CONFIG_UART_STM32_PORT_3=y
+
+# enable pinmux
+CONFIG_PINMUX=y
+
+# enable GPIO ports A, B, C, D, G
+CONFIG_GPIO=y
+
+# clock configuration
+CONFIG_CLOCK_CONTROL=y
+
+# Clock configuration for Cube Clock control driver
+CONFIG_CLOCK_STM32_HSE_CLOCK=8000000
+CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
+# use HSE as PLL input
+CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
+# however, the board does not have an external oscillator, so just use
+# the 8MHz clock signal coming from integrated STLink
+CONFIG_CLOCK_STM32_HSE_BYPASS=y
+# produce 96MHz clock at PLL output
+CONFIG_CLOCK_STM32_PLL_M_DIVISOR=8
+CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=360
+CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
+CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
+CONFIG_CLOCK_STM32_AHB_PRESCALER=1
+CONFIG_CLOCK_STM32_APB1_PRESCALER=4
+CONFIG_CLOCK_STM32_APB2_PRESCALER=2