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boards: adafruit_feather_stm32f405: Use dts for clocks configuration
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Convert board to use of device tree for clocks configuration.

Signed-off-by: Alexandre Bourdiol <[email protected]>
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ABOSTM authored and jaizpuruzin committed Jun 26, 2023
1 parent 545e96c commit a819419
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Showing 2 changed files with 23 additions and 17 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,28 @@
};
};

&clk_hse {
clock-frequency = <DT_FREQ_M(12)>;
status = "okay";
};

&pll {
div-m = <12>;
mul-n = <336>;
div-p = <2>;
div-q = <7>;
clocks = <&clk_hse>;
status = "okay";
};

&rcc {
clocks = <&pll>;
clock-frequency = <DT_FREQ_M(168)>;
ahb-prescaler = <1>;
apb1-prescaler = <4>;
apb2-prescaler = <2>;
};

&usart3 {
pinctrl-0 = <&usart3_tx_pb10 &usart3_rx_pb11>;
current-speed = <115200>;
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Expand Up @@ -2,8 +2,6 @@

CONFIG_SOC_SERIES_STM32F4X=y
CONFIG_SOC_STM32F405XG=y
# 168MHz system clock
CONFIG_SYS_CLOCK_HW_CYCLES_PER_SEC=168000000

# Enable MPU
CONFIG_ARM_MPU=y
Expand All @@ -23,19 +21,5 @@ CONFIG_PINMUX=y
# enable GPIO
CONFIG_GPIO=y

# clock configuration
# Enable Clocks
CONFIG_CLOCK_CONTROL=y

# Clock configuration for Cube Clock control driver
CONFIG_CLOCK_STM32_HSE_CLOCK=12000000
CONFIG_CLOCK_STM32_SYSCLK_SRC_PLL=y
# use HSE as PLL input
CONFIG_CLOCK_STM32_PLL_SRC_HSE=y
# produce 168MHz clock at PLL output
CONFIG_CLOCK_STM32_PLL_M_DIVISOR=12
CONFIG_CLOCK_STM32_PLL_N_MULTIPLIER=336
CONFIG_CLOCK_STM32_PLL_P_DIVISOR=2
CONFIG_CLOCK_STM32_PLL_Q_DIVISOR=7
CONFIG_CLOCK_STM32_AHB_PRESCALER=1
CONFIG_CLOCK_STM32_APB1_PRESCALER=4
CONFIG_CLOCK_STM32_APB2_PRESCALER=2

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