dts: nordic: nrf54h20: add nordic,clockpin-enable settings

Define which signals require CLOCKPIN enablement at SoC dts files. Signed-off-by: Gerard Marull-Paretas <[email protected]>
zephyrproject-rtos · Aug 12, 2024 · 746133a · 746133a
1 parent f463e6d
commit 746133a
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Showing 4 changed files with 63 additions and 3 deletions.
diff --git a/dts/bindings/i2c/nordic,nrf-twi-common.yaml b/dts/bindings/i2c/nordic,nrf-twi-common.yaml
@@ -4,7 +4,7 @@
 
 # Common fields for Nordic nRF family TWI peripherals
 
-include: [i2c-controller.yaml, pinctrl-device.yaml]
+include: [i2c-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
 
 properties:
   reg:

diff --git a/dts/bindings/serial/nordic,nrf-uart-common.yaml b/dts/bindings/serial/nordic,nrf-uart-common.yaml
@@ -1,4 +1,4 @@
-include: [uart-controller.yaml, pinctrl-device.yaml]
+include: [uart-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
 
 properties:
   reg:

diff --git a/dts/bindings/spi/nordic,nrf-spi-common.yaml b/dts/bindings/spi/nordic,nrf-spi-common.yaml
@@ -3,7 +3,7 @@
 
 # Common fields for Nordic nRF family SPI peripherals
 
-include: [spi-controller.yaml, pinctrl-device.yaml]
+include: [spi-controller.yaml, pinctrl-device.yaml, nordic-clockpin.yaml]
 
 properties:
   reg:

diff --git a/dts/common/nordic/nrf54h20.dtsi b/dts/common/nordic/nrf54h20.dtsi
@@ -561,6 +561,8 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart120: uart@8e6000 {
@@ -582,6 +584,8 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			cpuppr_vpr: vpr@908000 {
@@ -833,6 +837,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi130: spi@9a5000 {
@@ -846,13 +852,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart130: uart@9a5000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9a5000 0x1000>;
 				status = "disabled";
 				interrupts = <421 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			i2c131: i2c@9a6000 {
@@ -863,6 +874,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi131: spi@9a6000 {
@@ -876,13 +889,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart131: uart@9a6000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9a6000 0x1000>;
 				status = "disabled";
 				interrupts = <422 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			dppic134: dppic@9b1000 {
@@ -927,6 +945,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi132: spi@9b5000 {
@@ -940,13 +960,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart132: uart@9b5000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9b5000 0x1000>;
 				status = "disabled";
 				interrupts = <437 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			i2c133: i2c@9b6000 {
@@ -957,6 +982,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi133: spi@9b6000 {
@@ -970,13 +997,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart133: uart@9b6000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9b6000 0x1000>;
 				status = "disabled";
 				interrupts = <438 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			dppic135: dppic@9c1000 {
@@ -1021,6 +1053,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi134: spi@9c5000 {
@@ -1034,13 +1068,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart134: uart@9c5000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9c5000 0x1000>;
 				status = "disabled";
 				interrupts = <453 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			i2c135: i2c@9c6000 {
@@ -1051,6 +1090,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi135: spi@9c6000 {
@@ -1064,13 +1105,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart135: uart@9c6000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9c6000 0x1000>;
 				status = "disabled";
 				interrupts = <454 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			dppic136: dppic@9d1000 {
@@ -1115,6 +1161,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi136: spi@9d5000 {
@@ -1128,13 +1176,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart136: uart@9d5000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9d5000 0x1000>;
 				status = "disabled";
 				interrupts = <469 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 
 			i2c137: i2c@9d6000 {
@@ -1145,6 +1198,8 @@
 				easydma-maxcnt-bits = <15>;
 				#address-cells = <1>;
 				#size-cells = <0>;
+				nordic,clockpin-enable = <NRF_FUN_TWIM_SDA>,
+							 <NRF_FUN_TWIM_SCL>;
 			};
 
 			spi137: spi@9d6000 {
@@ -1158,13 +1213,18 @@
 				#size-cells = <0>;
 				rx-delay-supported;
 				rx-delay = <1>;
+				nordic,clockpin-enable = <NRF_FUN_SPIM_MOSI>,
+							 <NRF_FUN_SPIM_SCK>,
+							 <NRF_FUN_SPIS_MISO>,
+							 <NRF_FUN_SPIS_SCK>;
 			};
 
 			uart137: uart@9d6000 {
 				compatible = "nordic,nrf-uarte";
 				reg = <0x9d6000 0x1000>;
 				status = "disabled";
 				interrupts = <470 NRF_DEFAULT_IRQ_PRIORITY>;
+				nordic,clockpin-enable = <NRF_FUN_UART_TX>;
 			};
 		};
 	};