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feat: updating from newer svd2rust
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lucasbrendel authored Nov 24, 2023
1 parent 6d9d49e commit 7628b2f
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1 change: 1 addition & 0 deletions build.rs
Original file line number Diff line number Diff line change
@@ -1,3 +1,4 @@
#![doc = r" Builder file for Peripheral access crate generated by svd2rust tool"]
use std::env;
use std::fs::File;
use std::io::Write;
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70 changes: 56 additions & 14 deletions src/can.rs
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@@ -1,30 +1,72 @@
#[doc = r"Register block"]
#[repr(C)]
pub struct RegisterBlock {
#[doc = "0x00 - CAN Clock Control Register"]
pub clc: CLC,
clc: CLC,
_reserved1: [u8; 0x04],
id: ID,
fdr: FDR,
_reserved3: [u8; 0xf0],
list: [LIST; 16],
mspnd: [MSPND; 8],
_reserved5: [u8; 0x20],
msid: [MSID; 8],
_reserved6: [u8; 0x20],
msimask: MSIMASK,
panctr: PANCTR,
mcr: MCR,
mitr: MITR,
}
impl RegisterBlock {
#[doc = "0x00 - CAN Clock Control Register"]
#[inline(always)]
pub const fn clc(&self) -> &CLC {
&self.clc
}
#[doc = "0x08 - Module Identification Register"]
pub id: ID,
#[inline(always)]
pub const fn id(&self) -> &ID {
&self.id
}
#[doc = "0x0c - CAN Fractional Divider Register"]
pub fdr: FDR,
_reserved3: [u8; 0xf0],
#[inline(always)]
pub const fn fdr(&self) -> &FDR {
&self.fdr
}
#[doc = "0x100..0x140 - List Register"]
pub list: [LIST; 16],
#[inline(always)]
pub const fn list(&self, n: usize) -> &LIST {
&self.list[n]
}
#[doc = "0x140..0x160 - Message Pending Register"]
pub mspnd: [MSPND; 8],
_reserved5: [u8; 0x20],
#[inline(always)]
pub const fn mspnd(&self, n: usize) -> &MSPND {
&self.mspnd[n]
}
#[doc = "0x180..0x1a0 - Message Index Register"]
pub msid: [MSID; 8],
_reserved6: [u8; 0x20],
#[inline(always)]
pub const fn msid(&self, n: usize) -> &MSID {
&self.msid[n]
}
#[doc = "0x1c0 - Message Index Mask Register"]
pub msimask: MSIMASK,
#[inline(always)]
pub const fn msimask(&self) -> &MSIMASK {
&self.msimask
}
#[doc = "0x1c4 - Panel Control Register"]
pub panctr: PANCTR,
#[inline(always)]
pub const fn panctr(&self) -> &PANCTR {
&self.panctr
}
#[doc = "0x1c8 - Module Control Register"]
pub mcr: MCR,
#[inline(always)]
pub const fn mcr(&self) -> &MCR {
&self.mcr
}
#[doc = "0x1cc - Module Interrupt Trigger Register"]
pub mitr: MITR,
#[inline(always)]
pub const fn mitr(&self) -> &MITR {
&self.mitr
}
}
#[doc = "CLC (rw) register accessor: CAN Clock Control Register\n\nYou can [`read`](crate::generic::Reg::read) this register and get [`clc::R`]. You can [`reset`](crate::generic::Reg::reset), [`write`](crate::generic::Reg::write), [`write_with_zero`](crate::generic::Reg::write_with_zero) this register using [`clc::W`]. You can also [`modify`](crate::generic::Reg::modify) this register. See [API](https://docs.rs/svd2rust/#read--modify--write-api).\n\nFor information about available fields see [`mod@clc`]
module"]
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12 changes: 6 additions & 6 deletions src/can/clc.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,13 +5,13 @@ pub type W = crate::W<CLC_SPEC>;
#[doc = "Field `DISR` reader - Module Disable Request Bit"]
pub type DISR_R = crate::BitReader;
#[doc = "Field `DISR` writer - Module Disable Request Bit"]
pub type DISR_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
pub type DISR_W<'a, REG> = crate::BitWriter<'a, REG>;
#[doc = "Field `DISS` reader - Module Disable Status Bit"]
pub type DISS_R = crate::BitReader;
#[doc = "Field `EDIS` reader - Sleep Mode Enable Control"]
pub type EDIS_R = crate::BitReader;
#[doc = "Field `EDIS` writer - Sleep Mode Enable Control"]
pub type EDIS_W<'a, REG, const O: u8> = crate::BitWriter<'a, REG, O>;
pub type EDIS_W<'a, REG> = crate::BitWriter<'a, REG>;
impl R {
#[doc = "Bit 0 - Module Disable Request Bit"]
#[inline(always)]
Expand All @@ -33,14 +33,14 @@ impl W {
#[doc = "Bit 0 - Module Disable Request Bit"]
#[inline(always)]
#[must_use]
pub fn disr(&mut self) -> DISR_W<CLC_SPEC, 0> {
DISR_W::new(self)
pub fn disr(&mut self) -> DISR_W<CLC_SPEC> {
DISR_W::new(self, 0)
}
#[doc = "Bit 3 - Sleep Mode Enable Control"]
#[inline(always)]
#[must_use]
pub fn edis(&mut self) -> EDIS_W<CLC_SPEC, 3> {
EDIS_W::new(self)
pub fn edis(&mut self) -> EDIS_W<CLC_SPEC> {
EDIS_W::new(self, 3)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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12 changes: 6 additions & 6 deletions src/can/fdr.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,11 +5,11 @@ pub type W = crate::W<FDR_SPEC>;
#[doc = "Field `STEP` reader - Step Value"]
pub type STEP_R = crate::FieldReader<u16>;
#[doc = "Field `STEP` writer - Step Value"]
pub type STEP_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 10, O, u16>;
pub type STEP_W<'a, REG> = crate::FieldWriter<'a, REG, 10, u16>;
#[doc = "Field `DM` reader - Divider Mode"]
pub type DM_R = crate::FieldReader;
#[doc = "Field `DM` writer - Divider Mode"]
pub type DM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 2, O>;
pub type DM_W<'a, REG> = crate::FieldWriter<'a, REG, 2>;
impl R {
#[doc = "Bits 0:9 - Step Value"]
#[inline(always)]
Expand All @@ -26,14 +26,14 @@ impl W {
#[doc = "Bits 0:9 - Step Value"]
#[inline(always)]
#[must_use]
pub fn step(&mut self) -> STEP_W<FDR_SPEC, 0> {
STEP_W::new(self)
pub fn step(&mut self) -> STEP_W<FDR_SPEC> {
STEP_W::new(self, 0)
}
#[doc = "Bits 14:15 - Divider Mode"]
#[inline(always)]
#[must_use]
pub fn dm(&mut self) -> DM_W<FDR_SPEC, 14> {
DM_W::new(self)
pub fn dm(&mut self) -> DM_W<FDR_SPEC> {
DM_W::new(self, 14)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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14 changes: 7 additions & 7 deletions src/can/mcr.rs
Original file line number Diff line number Diff line change
Expand Up @@ -68,8 +68,8 @@ impl CLKSEL_R {
}
}
#[doc = "Field `CLKSEL` writer - Baud Rate Logic Clock Select"]
pub type CLKSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O, CLKSEL_A>;
impl<'a, REG, const O: u8> CLKSEL_W<'a, REG, O>
pub type CLKSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4, CLKSEL_A>;
impl<'a, REG> CLKSEL_W<'a, REG>
where
REG: crate::Writable + crate::RegisterSpec,
REG::Ux: From<u8>,
Expand Down Expand Up @@ -103,7 +103,7 @@ where
#[doc = "Field `MPSEL` reader - Message Pending Selector"]
pub type MPSEL_R = crate::FieldReader;
#[doc = "Field `MPSEL` writer - Message Pending Selector"]
pub type MPSEL_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 4, O>;
pub type MPSEL_W<'a, REG> = crate::FieldWriter<'a, REG, 4>;
impl R {
#[doc = "Bits 0:3 - Baud Rate Logic Clock Select"]
#[inline(always)]
Expand All @@ -120,14 +120,14 @@ impl W {
#[doc = "Bits 0:3 - Baud Rate Logic Clock Select"]
#[inline(always)]
#[must_use]
pub fn clksel(&mut self) -> CLKSEL_W<MCR_SPEC, 0> {
CLKSEL_W::new(self)
pub fn clksel(&mut self) -> CLKSEL_W<MCR_SPEC> {
CLKSEL_W::new(self, 0)
}
#[doc = "Bits 12:15 - Message Pending Selector"]
#[inline(always)]
#[must_use]
pub fn mpsel(&mut self) -> MPSEL_W<MCR_SPEC, 12> {
MPSEL_W::new(self)
pub fn mpsel(&mut self) -> MPSEL_W<MCR_SPEC> {
MPSEL_W::new(self, 12)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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6 changes: 3 additions & 3 deletions src/can/mitr.rs
Original file line number Diff line number Diff line change
@@ -1,13 +1,13 @@
#[doc = "Register `MITR` writer"]
pub type W = crate::W<MITR_SPEC>;
#[doc = "Field `IT` writer - Interrupt Trigger"]
pub type IT_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>;
pub type IT_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
impl W {
#[doc = "Bits 0:7 - Interrupt Trigger"]
#[inline(always)]
#[must_use]
pub fn it(&mut self) -> IT_W<MITR_SPEC, 0> {
IT_W::new(self)
pub fn it(&mut self) -> IT_W<MITR_SPEC> {
IT_W::new(self, 0)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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6 changes: 3 additions & 3 deletions src/can/msimask.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ pub type W = crate::W<MSIMASK_SPEC>;
#[doc = "Field `IM` reader - Message Index Mask"]
pub type IM_R = crate::FieldReader<u32>;
#[doc = "Field `IM` writer - Message Index Mask"]
pub type IM_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>;
pub type IM_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
impl R {
#[doc = "Bits 0:31 - Message Index Mask"]
#[inline(always)]
Expand All @@ -17,8 +17,8 @@ impl W {
#[doc = "Bits 0:31 - Message Index Mask"]
#[inline(always)]
#[must_use]
pub fn im(&mut self) -> IM_W<MSIMASK_SPEC, 0> {
IM_W::new(self)
pub fn im(&mut self) -> IM_W<MSIMASK_SPEC> {
IM_W::new(self, 0)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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6 changes: 3 additions & 3 deletions src/can/mspnd.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ pub type W = crate::W<MSPND_SPEC>;
#[doc = "Field `PND` reader - Message Pending"]
pub type PND_R = crate::FieldReader<u32>;
#[doc = "Field `PND` writer - Message Pending"]
pub type PND_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 32, O, u32>;
pub type PND_W<'a, REG> = crate::FieldWriter<'a, REG, 32, u32>;
impl R {
#[doc = "Bits 0:31 - Message Pending"]
#[inline(always)]
Expand All @@ -17,8 +17,8 @@ impl W {
#[doc = "Bits 0:31 - Message Pending"]
#[inline(always)]
#[must_use]
pub fn pnd(&mut self) -> PND_W<MSPND_SPEC, 0> {
PND_W::new(self)
pub fn pnd(&mut self) -> PND_W<MSPND_SPEC> {
PND_W::new(self, 0)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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18 changes: 9 additions & 9 deletions src/can/panctr.rs
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ pub type W = crate::W<PANCTR_SPEC>;
#[doc = "Field `PANCMD` reader - Panel Command"]
pub type PANCMD_R = crate::FieldReader;
#[doc = "Field `PANCMD` writer - Panel Command"]
pub type PANCMD_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>;
pub type PANCMD_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
#[doc = "Field `BUSY` reader - Panel Busy Flag"]
pub type BUSY_R = crate::BitReader<BUSY_A>;
#[doc = "Panel Busy Flag\n\nValue on reset: 1"]
Expand Down Expand Up @@ -81,11 +81,11 @@ impl RBUSY_R {
#[doc = "Field `PANAR1` reader - Panel Argument 1"]
pub type PANAR1_R = crate::FieldReader;
#[doc = "Field `PANAR1` writer - Panel Argument 1"]
pub type PANAR1_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>;
pub type PANAR1_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
#[doc = "Field `PANAR2` reader - Panel Argument 2"]
pub type PANAR2_R = crate::FieldReader;
#[doc = "Field `PANAR2` writer - Panel Argument 2"]
pub type PANAR2_W<'a, REG, const O: u8> = crate::FieldWriter<'a, REG, 8, O>;
pub type PANAR2_W<'a, REG> = crate::FieldWriter<'a, REG, 8>;
impl R {
#[doc = "Bits 0:7 - Panel Command"]
#[inline(always)]
Expand Down Expand Up @@ -117,20 +117,20 @@ impl W {
#[doc = "Bits 0:7 - Panel Command"]
#[inline(always)]
#[must_use]
pub fn pancmd(&mut self) -> PANCMD_W<PANCTR_SPEC, 0> {
PANCMD_W::new(self)
pub fn pancmd(&mut self) -> PANCMD_W<PANCTR_SPEC> {
PANCMD_W::new(self, 0)
}
#[doc = "Bits 16:23 - Panel Argument 1"]
#[inline(always)]
#[must_use]
pub fn panar1(&mut self) -> PANAR1_W<PANCTR_SPEC, 16> {
PANAR1_W::new(self)
pub fn panar1(&mut self) -> PANAR1_W<PANCTR_SPEC> {
PANAR1_W::new(self, 16)
}
#[doc = "Bits 24:31 - Panel Argument 2"]
#[inline(always)]
#[must_use]
pub fn panar2(&mut self) -> PANAR2_W<PANCTR_SPEC, 24> {
PANAR2_W::new(self)
pub fn panar2(&mut self) -> PANAR2_W<PANCTR_SPEC> {
PANAR2_W::new(self, 24)
}
#[doc = r" Writes raw bits to the register."]
#[doc = r""]
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