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# Copyright (C) 2018-2023 Intel Corporation | ||
# SPDX-License-Identifier: Apache-2.0 | ||
# | ||
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ov_add_sample(NAME bug_repro | ||
SOURCES "${CMAKE_CURRENT_SOURCE_DIR}/main.cpp" | ||
DEPENDENCIES format_reader ie_samples_utils) |
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#include <string> | ||
#include <thread> | ||
#include "openvino/openvino.hpp" | ||
#include "openvino/pass/serialize.hpp" | ||
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size_t getSystemDataByName(char* name) { | ||
auto parseLine = [](std::string line) -> size_t { | ||
std::string res = ""; | ||
for (auto c : line) | ||
if (isdigit(c)) | ||
res += c; | ||
if (res.empty()) | ||
throw std::runtime_error("Can't get system memory values"); | ||
return std::stoul(res); | ||
}; FILE* file = fopen("/proc/self/status", "r"); | ||
size_t result = 0; | ||
bool status = false; | ||
if (file != nullptr) { | ||
char line[128]; | ||
while (fgets(line, 128, file) != NULL) { | ||
if (strncmp(line, name, strlen(name)) == 0) { | ||
result = parseLine(line); | ||
status = true; | ||
break; | ||
} | ||
} | ||
fclose(file); | ||
} | ||
if (!status) | ||
throw std::runtime_error("Can't get system memory values"); | ||
return result; | ||
} | ||
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size_t getVmRSSInKB() { | ||
return getSystemDataByName(const_cast<char*>("VmRSS:")); | ||
} | ||
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ov::Core core; | ||
std::shared_ptr<ov::Model> model; | ||
std::string device_name = "CPU"; | ||
auto xrand = []() -> size_t { | ||
return (rand() % 200) + 100; | ||
}; | ||
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void StartThreadForRun() { | ||
auto compiled_model = core.compile_model(model, device_name); | ||
ov::InferRequest request = compiled_model.create_infer_request(); | ||
for (;;) { | ||
auto shape = ov::Shape{1, 3, xrand(), xrand()}; | ||
std::cerr << shape << std::endl; | ||
auto t = request.get_input_tensor(); | ||
t.set_shape(shape); | ||
request.set_input_tensor(t); | ||
request.infer(); | ||
std::cout << getVmRSSInKB() << std::endl; | ||
} | ||
} | ||
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int main() { | ||
model = core.read_model("/home/vgolubev/models/one_layer.xml"); | ||
StartThreadForRun(); | ||
} |
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<?xml version="1.0"?> | ||
<net name="Model3" version="11"> | ||
<layers> | ||
<layer id="0" name="Parameter_58" type="Parameter" version="opset1"> | ||
<data shape="1,3,?,?" element_type="f32" /> | ||
<output> | ||
<port id="0" precision="FP32" names="1"> | ||
<dim>1</dim> | ||
<dim>3</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="1" name="2" type="Const" version="opset1"> | ||
<data element_type="f32" shape="64, 3, 7, 7" offset="0" size="37632" /> | ||
<output> | ||
<port id="0" precision="FP32" names="2"> | ||
<dim>64</dim> | ||
<dim>3</dim> | ||
<dim>7</dim> | ||
<dim>7</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="2" name="20" type="Convolution" version="opset1"> | ||
<data strides="2, 2" dilations="1, 1" pads_begin="3, 3" pads_end="3, 3" auto_pad="explicit" /> | ||
<input> | ||
<port id="0" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>3</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
<port id="1" precision="FP32"> | ||
<dim>64</dim> | ||
<dim>3</dim> | ||
<dim>7</dim> | ||
<dim>7</dim> | ||
</port> | ||
</input> | ||
<output> | ||
<port id="2" precision="FP32" names="3"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="3" name="4" type="Const" version="opset1"> | ||
<data element_type="f32" shape="1, 64, 1, 1" offset="37632" size="256" /> | ||
<output> | ||
<port id="0" precision="FP32" names="4"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>1</dim> | ||
<dim>1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="4" name="5" type="Multiply" version="opset1"> | ||
<data auto_broadcast="numpy" /> | ||
<input> | ||
<port id="0" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
<port id="1" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>1</dim> | ||
<dim>1</dim> | ||
</port> | ||
</input> | ||
<output> | ||
<port id="2" precision="FP32" names="6"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="5" name="50" type="Const" version="opset1"> | ||
<data element_type="f32" shape="1, 64, 1, 1" offset="37888" size="256" /> | ||
<output> | ||
<port id="0" precision="FP32" names="5"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>1</dim> | ||
<dim>1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="6" name="6" type="Add" version="opset1"> | ||
<data auto_broadcast="numpy" /> | ||
<input> | ||
<port id="0" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
<port id="1" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>1</dim> | ||
<dim>1</dim> | ||
</port> | ||
</input> | ||
<output> | ||
<port id="2" precision="FP32" names="7"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="7" name="7" type="ReLU" version="opset1"> | ||
<input> | ||
<port id="0" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</input> | ||
<output> | ||
<port id="1" precision="FP32" names="8"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</output> | ||
</layer> | ||
<layer id="8" name="Result_59" type="Result" version="opset1"> | ||
<input> | ||
<port id="0" precision="FP32"> | ||
<dim>1</dim> | ||
<dim>64</dim> | ||
<dim>-1</dim> | ||
<dim>-1</dim> | ||
</port> | ||
</input> | ||
</layer> | ||
</layers> | ||
<edges> | ||
<edge from-layer="0" from-port="0" to-layer="2" to-port="0" /> | ||
<edge from-layer="1" from-port="0" to-layer="2" to-port="1" /> | ||
<edge from-layer="2" from-port="2" to-layer="4" to-port="0" /> | ||
<edge from-layer="3" from-port="0" to-layer="4" to-port="1" /> | ||
<edge from-layer="4" from-port="2" to-layer="6" to-port="0" /> | ||
<edge from-layer="5" from-port="0" to-layer="6" to-port="1" /> | ||
<edge from-layer="6" from-port="2" to-layer="7" to-port="0" /> | ||
<edge from-layer="7" from-port="1" to-layer="8" to-port="0" /> | ||
</edges> | ||
<rt_info /> | ||
</net> |
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