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Alexandra's comments applied: second part
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@v-Golubev
v-Golubev committed Jan 24, 2024
1 parent 67a46b3 commit 7117928
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Showing 4 changed files with 25 additions and 18 deletions.
2 changes: 1 addition & 1 deletion src/common/snippets/src/lowered/pass/insert_specific_iterations.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -81,7 +81,7 @@ bool InsertSpecificIterations::run(LinearIR& linear_ir, lowered::LinearIR::const
const auto& handlers = loop_info->get_handlers();

const auto main_loop_begin_it = linear_ir.find(linear_ir.get_expr_by_node(loop_end->get_loop_begin()));
const auto main_loop_end_it = linear_ir.find(linear_ir.get_expr_by_node(loop_end));
const auto main_loop_end_it = linear_ir.find_after(main_loop_begin_it, linear_ir.get_expr_by_node(loop_end));
// Note: handlers must be run on the range started with the first operation in the loop body.
const auto main_first_body_op_it = std::next(main_loop_begin_it);

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10 changes: 8 additions & 2 deletions src/common/snippets/src/lowered/pass/iter_handler.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -18,11 +18,14 @@ namespace pass {
UpdateMemoryAccessCounts::UpdateMemoryAccessCounts(size_t count) : RangedPass(), m_count(count) {}

bool UpdateMemoryAccessCounts::run(LinearIR& linear_ir, LinearIR::constExprIt begin, LinearIR::constExprIt end) {
bool status = false;
for (auto expr_it = begin; expr_it != end; expr_it++) {
// Skip inner Loops
const auto loop_begin = ov::as_type_ptr<op::LoopBegin>(expr_it->get()->get_node());
if (loop_begin) {
expr_it = linear_ir.find(expr_it, end, linear_ir.get_expr_by_node(loop_begin->get_loop_end()));
if (expr_it == end)
return status;
continue;
}

Expand All @@ -40,9 +43,10 @@ bool UpdateMemoryAccessCounts::run(LinearIR& linear_ir, LinearIR::constExprIt be
memory_access->set_output_count(m_count, port);
}
}
status = true;
}
}
return true;
return status;
}

bool UpdateMemoryAccessCounts::can_be_merged(const std::shared_ptr<pass::PassBase>& other) {
Expand Down Expand Up @@ -73,6 +77,8 @@ bool TransformInnerSplitLoop::run(LinearIR& linear_ir, LinearIR::constExprIt beg
const auto& expr = *end;
const auto node = expr->get_node();
const auto loop_end = ov::as_type_ptr<op::LoopEnd>(node);
OPENVINO_ASSERT(loop_end, "the last operation in range must be LoopEnd");

const auto& loop_manager = linear_ir.get_loop_manager();
const auto& loop_info = loop_manager->get_loop_info(loop_end->get_id());
const auto current_dim_idx = loop_info->get_dim_idx();
Expand Down Expand Up @@ -102,7 +108,7 @@ bool TransformInnerSplitLoop::run(LinearIR& linear_ir, LinearIR::constExprIt beg
inner_loop_end->set_increment(std::min(inner_loop_increment, m_tail_size));
inner_loop_end->set_finalization_offsets(inner_finalization_offsets);
const auto inner_loop_begin_it = std::find(begin, it, linear_ir.get_expr_by_node(inner_loop_begin));
const auto inner_loop_end_it = std::next(end);
const auto inner_loop_end_it = std::next(it);
OPENVINO_ASSERT(inner_loop_begin_it != it, "LoopBegin has not been found!");
const auto& last_iter_handlers = inner_loop_info->get_handlers().get_last_iter_handelrs();
last_iter_handlers.run(linear_ir, std::next(inner_loop_begin_it), inner_loop_end_it);
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25 changes: 11 additions & 14 deletions src/common/snippets/src/lowered/pass/propagate_subtensors.cpp
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Expand Up @@ -30,22 +30,20 @@ void propagate_updated_subtensor_through_loop(const LinearIR& linear_ir,
const auto& reg_type = port.expr_port->get_descriptor_ptr()->get_reg().type;
if ((port.is_incremented && reg_type == RegType::gpr) || (reg_type == RegType::vec)) {
const auto& expr = port.expr_port->get_expr();
const auto node = expr->get_node();
auto desc = port.expr_port->get_descriptor_ptr();
const auto& desc = port.expr_port->get_descriptor_ptr();
auto subtensor = desc->get_subtensor();
if (port.dim_idx < subtensor.size()) {
*(subtensor.rbegin() + port.dim_idx) = new_dim_value;
desc->set_subtensor(subtensor);
}

const auto parent_desc = expr->get_input_port_connector(port.expr_port->get_index())->get_source().get_descriptor_ptr();
const auto& layout = parent_desc->get_layout();
const auto& shape = parent_desc->get_shape();
const auto& parent_shape = parent_desc->get_shape();
if (original_shapes.find(parent_desc) == original_shapes.end()) {
original_shapes[parent_desc] = shape;
original_shapes[parent_desc] = parent_shape;
}
auto new_shape = shape;
new_shape[*(layout.rbegin() + port.dim_idx)] = new_dim_value;
auto new_shape = parent_shape;
new_shape[*(desc->get_layout().rbegin() + port.dim_idx)] = new_dim_value;
parent_desc->set_shape(new_shape);
}
}
Expand All @@ -54,19 +52,18 @@ void propagate_updated_subtensor_through_loop(const LinearIR& linear_ir,
auto update_only_dim_idx_with_subtensor_value = [&](const LinearIR::LoopManager::LoopPort& port) {
const auto& reg_type = port.expr_port->get_descriptor_ptr()->get_reg().type;
if ((port.is_incremented && reg_type == RegType::gpr) || (reg_type == RegType::vec)) {
auto desc = port.expr_port->get_descriptor_ptr();
const auto desc = port.expr_port->get_descriptor_ptr();
const auto expr = port.expr_port->get_expr();
const auto parent_desc = expr->get_input_port_connector(port.expr_port->get_index())->get_source().get_descriptor_ptr();

const auto& layout = parent_desc->get_layout();
const auto& shape = parent_desc->get_shape();
const auto& parent_shape = parent_desc->get_shape();
const auto& desc_subtensor = desc->get_subtensor();
if (port.dim_idx < desc_subtensor.size()) {
if (original_shapes.find(parent_desc) == original_shapes.end()) {
original_shapes[parent_desc] = shape;
original_shapes[parent_desc] = parent_shape;
}
auto new_shape = shape;
new_shape[*(layout.rbegin() + port.dim_idx)] = *(desc_subtensor.rbegin() + port.dim_idx);
auto new_shape = parent_shape;
new_shape[*(desc->get_layout().rbegin() + port.dim_idx)] = *(desc_subtensor.rbegin() + port.dim_idx);
parent_desc->set_shape(new_shape);
}
}
Expand Down Expand Up @@ -100,7 +97,7 @@ void propagate_updated_subtensor_through_loop(const LinearIR& linear_ir,
const auto loop_end = loop_begin->get_loop_end();
const auto inner_loop_info = linear_ir.get_loop_manager()->get_loop_info(loop_end->get_id());
const auto inner_begin = std::next(expr_it);
const auto inner_end = linear_ir.find(linear_ir.get_expr_by_node(loop_end));
const auto inner_end = linear_ir.find_after(inner_begin, linear_ir.get_expr_by_node(loop_end));

// The corresponding shapes of inner loops entry points must be updated using existing subtensor values
if (!most_outer_loop) {
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6 changes: 5 additions & 1 deletion src/plugins/intel_cpu/src/emitters/snippets/x64/jit_fill_emitter.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -59,7 +59,11 @@ void jit_fill_emitter::emit_isa(const std::vector<size_t> &in, const std::vector
Vmm src_vmm = Vmm(in[0]);
Vmm dst_vmm = Vmm(out[0]);

if (is_full_reg())
const size_t supported_et_size = 4;
const auto register_capacity = (src_vmm.getBit() / 8) / supported_et_size;
if (offset == register_capacity)
h->uni_vmovups(dst_vmm, src_vmm);
else if (is_full_reg())
fill_full<Vmm>(dst_vmm);
else
fill_tail<Vmm>(src_vmm, dst_vmm);
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