[AArch64][SVE 11/32] Tweak aarch64_reg_parse_32_64 interface

aarch64_reg_parse_32_64 is currently used to parse address registers,
among other things.  It returns two bits of information about the
register: whether it's W rather than X, and whether it's a zero register.

SVE adds addressing modes in which the base or offset can be a vector
register instead of a scalar, so a choice between W and X is no longer
enough.  It's more convenient to pass the type of register around as
a qualifier instead.

As it happens, two callers of aarch64_reg_parse_32_64 already wanted
the information in the form of a qualifier, so the change feels pretty
natural even without SVE.

Also, the function took two parameters to control whether {W}SP
and (W|X)ZR should be accepted.  We tend to get slightly better
error messages by accepting them regardless and getting the caller
to do the check, rather than potentially treating "xzr", "sp" etc.
as constants.  This is easier to do if the function returns the
reg_entry rather than just the register number.

This does create a corner case where:

	.equ	sp, 1
	ldr	w0, [x0, sp]

was previously an acceptable way of writing "ldr w0, [x0, #1]",
but I don't think it's important to continue supporting that.
We already rejected things like:

	.equ	sp, 1
	add	x0, x1, sp

To ensure these new error messages "win" when matching against
several candidate instruction entries, we need to use the same
address-parsing code for all addresses, including ADDR_SIMPLE
and SIMD_ADDR_SIMPLE.  The next patch also relies on this.

Finally, aarcch64_check_reg_type was written in a pretty
conservative way.  It should always be equivalent to a single
bit test.

gas/
	* config/tc-aarch64.c (REG_TYPE_R_Z, REG_TYPE_R_SP): New register
	types.
	(get_reg_expected_msg): Handle them and REG_TYPE_R64_SP.
	(aarch64_check_reg_type): Simplify.
	(aarch64_reg_parse_32_64): Return the reg_entry instead of the
	register number.  Return the type as a qualifier rather than an
	"isreg32" boolean.  Remove reject_sp, reject_rz and isregzero
	parameters.
	(parse_shifter_operand): Update call to aarch64_parse_32_64_reg.
	Use get_reg_expected_msg.
	(parse_address_main): Likewise.  Use aarch64_check_reg_type.
	(po_int_reg_or_fail): Replace reject_sp and reject_rz parameters
	with a reg_type parameter.  Update call to aarch64_parse_32_64_reg.
	Use aarch64_check_reg_type to test the result.
	(parse_operands): Update after the above changes.  Parse ADDR_SIMPLE
	addresses normally before enforcing the syntax restrictions.
	* testsuite/gas/aarch64/diagnostic.s: Add tests for a post-index
	zero register and for a stack pointer index.
	* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
	Also update existing diagnostic messages after the above changes.
	* testsuite/gas/aarch64/illegal-lse.l: Update the error message
	for 32-bit register bases.

gas/ChangeLog

@@ -1,3 +1,28 @@
+2016-09-21  Richard Sandiford  <[email protected]>
+
+	* config/tc-aarch64.c (REG_TYPE_R_Z, REG_TYPE_R_SP): New register
+	types.
+	(get_reg_expected_msg): Handle them and REG_TYPE_R64_SP.
+	(aarch64_check_reg_type): Simplify.
+	(aarch64_reg_parse_32_64): Return the reg_entry instead of the
+	register number.  Return the type as a qualifier rather than an
+	"isreg32" boolean.  Remove reject_sp, reject_rz and isregzero
+	parameters.
+	(parse_shifter_operand): Update call to aarch64_parse_32_64_reg.
+	Use get_reg_expected_msg.
+	(parse_address_main): Likewise.  Use aarch64_check_reg_type.
+	(po_int_reg_or_fail): Replace reject_sp and reject_rz parameters
+	with a reg_type parameter.  Update call to aarch64_parse_32_64_reg.
+	Use aarch64_check_reg_type to test the result.
+	(parse_operands): Update after the above changes.  Parse ADDR_SIMPLE
+	addresses normally before enforcing the syntax restrictions.
+	* testsuite/gas/aarch64/diagnostic.s: Add tests for a post-index
+	zero register and for a stack pointer index.
+	* testsuite/gas/aarch64/diagnostic.l: Update accordingly.
+	Also update existing diagnostic messages after the above changes.
+	* testsuite/gas/aarch64/illegal-lse.l: Update the error message
+	for 32-bit register bases.
+
 2016-09-21  Richard Sandiford  <[email protected]>
 
 	* config/tc-aarch64.c (parse_aarch64_imm_float): Remove range check.