Add mixcolumns step accedently removed earlier.

Signed-off-by: Tom Kaitchuck <[email protected]>
tkaitchuck · Mar 27, 2024 · d815ed3 · d815ed3
1 parent 288b21b
commit d815ed3
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Showing 2 changed files with 2 additions and 10 deletions.
diff --git a/src/aes_hash.rs b/src/aes_hash.rs
@@ -101,16 +101,8 @@ impl AHasher {
         let result: [u64; 2] = aesdec(combined, combined).convert();
         result[0]
     }
-
-    #[inline]
-    #[cfg(any(target_arch = "aarch64", target_arch = "arm"))]
-    fn final_mix(&self) -> u128 {
-        let sum = aesenc(self.sum, self.key);
-        aesdec(aesdec(sum, self.enc), sum)
-    }
 
     #[inline]
-    #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
     fn final_mix(&self) -> u128 {
         let combined = aesenc(self.sum, self.enc);
         aesdec(aesdec(combined, self.key), combined)

diff --git a/src/operations.rs b/src/operations.rs
@@ -127,7 +127,7 @@ pub(crate) fn aesenc(value: u128, xor: u128) -> u128 {
     use core::arch::aarch64::*;
     #[cfg(target_arch = "arm")]
     use core::arch::arm::*;
-    unsafe { transmute!(vaeseq_u8(transmute!(value), transmute!(xor))) }
+    unsafe { transmute!(vaesmcq_u8(vaeseq_u8(transmute!(value), transmute!(xor)))) }
 }
 
 #[cfg(all(any(target_arch = "x86", target_arch = "x86_64"), target_feature = "aes", not(miri)))]
@@ -155,7 +155,7 @@ pub(crate) fn aesdec(value: u128, xor: u128) -> u128 {
     use core::arch::aarch64::*;
     #[cfg(target_arch = "arm")]
     use core::arch::arm::*;
-    unsafe { transmute!(vaesdq_u8(transmute!(value), transmute!(xor))) }
+    unsafe { transmute!(vaesimcq_u8(vaesdq_u8(transmute!(value), transmute!(xor)))) }
 }
 
 #[allow(unused)]