arch/risc-v: Apply common mtime driver to mtime based chps

Signed-off-by: Huang Qi <[email protected]>

arch/risc-v/Kconfig

@@ -16,6 +16,8 @@ config ARCH_CHIP_FE310
 	select ARCH_RV_ISA_M
 	select ARCH_RV_ISA_A
 	select ARCH_RV_ISA_C
+	select ONESHOT
+	select ALARM_ARCH
 	---help---
 		SiFive FE310 processor (E31 RISC-V Core with MAC extensions).
 
@@ -28,6 +30,8 @@ config ARCH_CHIP_K210
 	select ARCH_HAVE_MPU
 	select ARCH_HAVE_TESTSET
 	select ARCH_HAVE_MULTICPU
+	select ONESHOT
+	select ALARM_ARCH
 	---help---
 		Kendryte K210 processor (RISC-V 64bit core with GC extensions)
 
@@ -48,6 +52,8 @@ config ARCH_CHIP_BL602
 	select ARCH_RV_ISA_C
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_RESET
+	select ONESHOT
+	select ALARM_ARCH
 	---help---
 		BouffaloLab BL602(rv32imfc)
 
@@ -85,6 +91,8 @@ config ARCH_CHIP_C906
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
 	select ARCH_HAVE_MPU
+	select ONESHOT
+	select ALARM_ARCH
 	---help---
 		THEAD C906 processor (RISC-V 64bit core with GCVX extensions).
 
@@ -104,6 +112,8 @@ config ARCH_CHIP_MPFS
 	select ARCH_HAVE_PWM_MULTICHAN
 	select ARCH_HAVE_S_MODE
 	select PMP_HAS_LIMITED_FEATURES
+	select ONESHOT
+	select ALARM_ARCH
 	---help---
 		MicroChip Polarfire processor (RISC-V 64bit core with GCVX extensions).
 
@@ -120,6 +130,8 @@ config ARCH_CHIP_QEMU_RV
 	select ARCH_HAVE_FPU
 	select ARCH_HAVE_DPFPU
 	select ARCH_HAVE_MULTICPU
+	select ONESHOT
+	select ALARM_ARCH
 	---help---
 		QEMU Generic RV32/RV64 processor
 

arch/risc-v/src/bl602/Make.defs

@@ -34,7 +34,7 @@ CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
 CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
 CMN_CSRCS += riscv_sigdeliver.c riscv_udelay.c riscv_unblocktask.c riscv_usestack.c
 CMN_CSRCS += riscv_idle.c riscv_tcbinfo.c riscv_getnewintctx.c riscv_doirq.c
-CMN_CSRCS += riscv_exception.c
+CMN_CSRCS += riscv_exception.c riscv_mtimer.c
 
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)
 CMN_CSRCS += riscv_backtrace.c

arch/risc-v/src/bl602/bl602_timerisr.c

@@ -24,102 +24,31 @@
 
 #include <nuttx/config.h>
 
+#include <assert.h>
 #include <stdint.h>
 #include <time.h>
 #include <debug.h>
 
 #include <nuttx/arch.h>
 #include <nuttx/clock.h>
 #include <nuttx/spinlock.h>
+#include <nuttx/timers/arch_alarm.h>
 #include <arch/board/board.h>
 #include "hardware/bl602_clic.h"
 #include "riscv_internal.h"
+#include "riscv_mtimer.h"
 #include "chip.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-/* Private definetions: mtimer frequency */
-#define TICK_COUNT (10 * 1000 * 1000 / TICK_PER_SEC)
+#define MTIMER_FREQ 10000000
 
 /****************************************************************************
  * Private Data
  ****************************************************************************/
 
-static bool g_b_tick_started = false;
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/* bl602 mmio registers are a bit odd, by default they are byte-wide
- * registers that are on 32-bit word boundaries. So a "32-bit" registers
- * is actually broken into four bytes spanning a total address space of
- * 16 bytes.
- */
-
-static inline uint64_t bl602_clint_time_read(void)
-{
-  uint64_t r = getreg32(BL602_CLIC_MTIME + 4);
-  r <<= 32;
-  r |= getreg32(BL602_CLIC_MTIME);
-
-  return r;
-}
-
-static inline uint64_t bl602_clint_time_cmp_read(void)
-{
-  return getreg64(BL602_CLIC_MTIMECMP);
-}
-
-static inline void bl602_clint_time_cmp_write(uint64_t v)
-{
-  putreg64(v, BL602_CLIC_MTIMECMP);
-}
-
-/****************************************************************************
- * Name:  bl602_reload_mtimecmp
- ****************************************************************************/
-
-static void bl602_reload_mtimecmp(void)
-{
-  irqstate_t flags = spin_lock_irqsave(NULL);
-
-  uint64_t current;
-  uint64_t next;
-
-  if (!g_b_tick_started)
-    {
-      g_b_tick_started = true;
-      current          = bl602_clint_time_read();
-    }
-  else
-    {
-      current = bl602_clint_time_cmp_read();
-    }
-
-  next = current + TICK_COUNT;
-
-  bl602_clint_time_cmp_write(next);
-
-  spin_unlock_irqrestore(NULL, flags);
-}
-
-/****************************************************************************
- * Name:  bl602_timerisr
- ****************************************************************************/
-
-static int bl602_timerisr(int irq, void *context, void *arg)
-{
-  bl602_reload_mtimecmp();
-
-  /* Process timer interrupt */
-
-  nxsched_process_timer();
-  return 0;
-}
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -135,15 +64,11 @@ static int bl602_timerisr(int irq, void *context, void *arg)
 
 void up_timer_initialize(void)
 {
-  /* Attach timer interrupt handler */
-
-  irq_attach(RISCV_IRQ_MTIMER, bl602_timerisr, NULL);
-
-  /* Reload CLINT mtimecmp */
-
-  bl602_reload_mtimecmp();
+  struct oneshot_lowerhalf_s *lower = riscv_mtimer_initialize(
+    BL602_CLIC_MTIME, BL602_CLIC_MTIMECMP,
+    RISCV_IRQ_MTIMER, MTIMER_FREQ);
 
-  /* And enable the timer interrupt */
+  DEBUGASSERT(lower);
 
-  up_enable_irq(RISCV_IRQ_MTIMER);
+  up_alarm_set_lowerhalf(lower);
 }

arch/risc-v/src/c906/Make.defs

@@ -33,7 +33,7 @@ CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c
 CMN_CSRCS += riscv_releasepending.c riscv_reprioritizertr.c
 CMN_CSRCS += riscv_releasestack.c riscv_stackframe.c riscv_schedulesigaction.c
 CMN_CSRCS += riscv_sigdeliver.c riscv_unblocktask.c riscv_usestack.c
-CMN_CSRCS += riscv_mdelay.c riscv_idle.c riscv_doirq.c
+CMN_CSRCS += riscv_mdelay.c riscv_idle.c riscv_doirq.c riscv_mtimer.c
 CMN_CSRCS += riscv_tcbinfo.c riscv_getnewintctx.c
 
 ifeq ($(CONFIG_SCHED_BACKTRACE),y)

arch/risc-v/src/c906/c906_timerisr.c

@@ -30,78 +30,25 @@
 
 #include <nuttx/arch.h>
 #include <nuttx/spinlock.h>
+#include <nuttx/timers/arch_alarm.h>
 #include <arch/board/board.h>
 
+#include "hardware/c906_clint.h"
 #include "riscv_internal.h"
+#include "riscv_mtimer.h"
 #include "c906.h"
 #include "c906_clockconfig.h"
 
 /****************************************************************************
  * Pre-processor Definitions
  ****************************************************************************/
 
-#define getreg64(a)   (*(volatile uint64_t *)(a))
-#define putreg64(v,a) (*(volatile uint64_t *)(a) = (v))
-
 #ifdef CONFIG_C906_WITH_QEMU
-#define TICK_COUNT (10000000UL / TICK_PER_SEC)
+#define MTIMER_FREQ 10000000UL
 #else
-#define TICK_COUNT ((c906_get_cpuclk()) / TICK_PER_SEC)
+#define MTIMER_FREQ c906_get_cpuclk()
 #endif
 
-/****************************************************************************
- * Private Data
- ****************************************************************************/
-
-static bool _b_tick_started = false;
-
-/****************************************************************************
- * Private Functions
- ****************************************************************************/
-
-/****************************************************************************
- * Name:  c906_reload_mtimecmp
- ****************************************************************************/
-
-static void c906_reload_mtimecmp(void)
-{
-  irqstate_t flags = spin_lock_irqsave(NULL);
-
-  uint64_t current;
-  uint64_t next;
-
-  if (!_b_tick_started)
-    {
-      _b_tick_started = true;
-      current = getreg64(C906_CLINT_MTIME);
-    }
-  else
-    {
-      current = getreg64(C906_CLINT_MTIMECMP);
-    }
-
-  uint64_t tick = TICK_COUNT;
-  next = current + tick;
-
-  putreg64(next, C906_CLINT_MTIMECMP);
-
-  spin_unlock_irqrestore(NULL, flags);
-}
-
-/****************************************************************************
- * Name:  c906_timerisr
- ****************************************************************************/
-
-static int c906_timerisr(int irq, void *context, void *arg)
-{
-  c906_reload_mtimecmp();
-
-  /* Process timer interrupt */
-
-  nxsched_process_timer();
-  return 0;
-}
-
 /****************************************************************************
  * Public Functions
  ****************************************************************************/
@@ -117,15 +64,11 @@ static int c906_timerisr(int irq, void *context, void *arg)
 
 void up_timer_initialize(void)
 {
-  /* Attach timer interrupt handler */
-
-  irq_attach(RISCV_IRQ_MTIMER, c906_timerisr, NULL);
-
-  /* Reload CLINT mtimecmp */
-
-  c906_reload_mtimecmp();
+  struct oneshot_lowerhalf_s *lower = riscv_mtimer_initialize(
+    C906_CLINT_MTIME, C906_CLINT_MTIMECMP,
+    RISCV_IRQ_MTIMER, MTIMER_FREQ);
 
-  /* And enable the timer interrupt */
+  DEBUGASSERT(lower);
 
-  up_enable_irq(RISCV_IRQ_MTIMER);
+  up_alarm_set_lowerhalf(lower);
 }

arch/risc-v/src/fe310/Make.defs

@@ -26,7 +26,7 @@ HEAD_ASRC = fe310_head.S
 CMN_ASRCS += riscv_vectors.S riscv_testset.S riscv_exception_common.S
 
 # Specify C code within the common directory to be included
-CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_exception.c
+CMN_CSRCS += riscv_initialize.c riscv_swint.c riscv_exception.c riscv_mtimer.c
 CMN_CSRCS += riscv_allocateheap.c riscv_createstack.c riscv_exit.c
 CMN_CSRCS += riscv_assert.c riscv_blocktask.c riscv_copystate.c riscv_initialstate.c
 CMN_CSRCS += riscv_interruptcontext.c riscv_modifyreg32.c riscv_puts.c riscv_mdelay.c