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add another 5 modes for ringmod in mixer #6935

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Apr 17, 2023
Merged

add another 5 modes for ringmod in mixer #6935

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15 changes: 10 additions & 5 deletions src/common/SurgeStorage.h
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Original file line number Diff line number Diff line change
Expand Up @@ -181,11 +181,16 @@ enum NoiseColorChannels
enum RingModMode
{
rmm_ring = 0,
rmm_cxor = 1,
rmm_cxor_f1 = 2,
rmm_cxor_f2 = 3,
rmm_cxor_f3 = 4,
rmm_cxor_f4 = 5
rmm_cxor43_0 = 1,
rmm_cxor43_1 = 2,
rmm_cxor43_2 = 3,
rmm_cxor43_3 = 4,
rmm_cxor43_4 = 5,
rmm_cxor93_0 = 6,
rmm_cxor93_1 = 7,
rmm_cxor93_2 = 8,
rmm_cxor93_3 = 9,
rmm_cxor93_4 = 10
};

enum lfo_trigger_mode
Expand Down
85 changes: 60 additions & 25 deletions src/common/dsp/SurgeVoice.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -843,25 +843,45 @@ inline void all_ring_modes_block(float *__restrict src1_l, float *__restrict src
mul_block(src1_l, src2_l, dst_l, nquads);
mul_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor:
cxor_block(src1_l, src2_l, dst_l, nquads);
cxor_block(src1_r, src2_r, dst_r, nquads);
case RingModMode::rmm_cxor43_0:
cxor43_0_block(src1_l, src2_l, dst_l, nquads);
cxor43_0_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor_f1:
cxor_f1_block(src1_l, src2_l, dst_l, nquads);
cxor_f1_block(src1_r, src2_r, dst_r, nquads);
case RingModMode::rmm_cxor43_1:
cxor43_1_block(src1_l, src2_l, dst_l, nquads);
cxor43_1_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor_f2:
cxor_f2_block(src1_l, src2_l, dst_l, nquads);
cxor_f2_block(src1_r, src2_r, dst_r, nquads);
case RingModMode::rmm_cxor43_2:
cxor43_2_block(src1_l, src2_l, dst_l, nquads);
cxor43_2_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor_f3:
cxor_f3_block(src1_l, src2_l, dst_l, nquads);
cxor_f3_block(src1_r, src2_r, dst_r, nquads);
case RingModMode::rmm_cxor43_3:
cxor43_3_block(src1_l, src2_l, dst_l, nquads);
cxor43_3_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor_f4:
cxor_f4_block(src1_l, src2_l, dst_l, nquads);
cxor_f4_block(src1_r, src2_r, dst_r, nquads);
case RingModMode::rmm_cxor43_4:
cxor43_4_block(src1_l, src2_l, dst_l, nquads);
cxor43_4_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor93_0:
cxor93_0_block(src1_l, src2_l, dst_l, nquads);
cxor93_0_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor93_1:
cxor93_1_block(src1_l, src2_l, dst_l, nquads);
cxor93_1_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor93_2:
cxor93_2_block(src1_l, src2_l, dst_l, nquads);
cxor93_2_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor93_3:
cxor93_3_block(src1_l, src2_l, dst_l, nquads);
cxor93_3_block(src1_r, src2_r, dst_r, nquads);
break;
case RingModMode::rmm_cxor93_4:
cxor93_4_block(src1_l, src2_l, dst_l, nquads);
cxor93_4_block(src1_r, src2_r, dst_r, nquads);
break;
default:
mul_block(src1_l, src2_l, dst_l, nquads);
Expand All @@ -877,20 +897,35 @@ inline void all_ring_modes_block(float *__restrict src1_l, float *__restrict src
case RingModMode::rmm_ring:
mul_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor:
cxor_block(src1_l, src2_l, dst_l, nquads);
case RingModMode::rmm_cxor43_0:
cxor43_0_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor43_1:
cxor43_1_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor43_2:
cxor43_2_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor43_3:
cxor43_3_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor43_4:
cxor43_4_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor93_0:
cxor93_0_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor_f1:
cxor_f1_block(src1_l, src2_l, dst_l, nquads);
case RingModMode::rmm_cxor93_1:
cxor93_1_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor_f2:
cxor_f2_block(src1_l, src2_l, dst_l, nquads);
case RingModMode::rmm_cxor93_2:
cxor93_2_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor_f3:
cxor_f3_block(src1_l, src2_l, dst_l, nquads);
case RingModMode::rmm_cxor93_3:
cxor93_3_block(src1_l, src2_l, dst_l, nquads);
break;
case RingModMode::rmm_cxor_f4:
cxor_f4_block(src1_l, src2_l, dst_l, nquads);
case RingModMode::rmm_cxor93_4:
cxor93_4_block(src1_l, src2_l, dst_l, nquads);
break;
default:
mul_block(src1_l, src2_l, dst_l, nquads);
Expand Down
139 changes: 41 additions & 98 deletions src/common/dsp/vembertech/basic_dsp.h
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Original file line number Diff line number Diff line change
Expand Up @@ -54,164 +54,107 @@ inline void mul_block(float *__restrict src1, float scalar, float *__restrict ds
}
}

inline void cxor_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
inline void cxor43_0_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
dst[i] = fmin(fmax(src1[i], src2[i]), -fmin(src1[i], src2[i]));
}
}
inline void cxor_block(float *__restrict src1, float scalar, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
dst[i] = fmin(fmax(src1[i], scalar), -fmin(src1[i], scalar));
}
}

inline void cxor_f1_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
inline void cxor43_1_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto v1 = fmax(src1[i], src2[i]);
const auto cx = fmin(v1, -fmin(src1[i], src2[i]));
const auto v2 = -fmin(cx, v1);
dst[i] = fmin(v1, v2);
}
}
inline void cxor_f1_block(float *__restrict src1, float scalar, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto v1 = fmax(src1[i], scalar);
const auto cx = fmin(v1, -fmin(src1[i], scalar));
const auto v2 = -fmin(cx, v1);
dst[i] = fmin(v1, v2);
dst[i] = fmin(v1, -fmin(cx, v1));
}
}

inline void cxor_f2_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
inline void cxor43_2_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto v1 = fmax(src1[i], src2[i]);
const auto cx = fmin(v1, -fmin(src1[i], src2[i]));
const auto v2 = -fmin(cx, v1);
dst[i] = fmin(src1[i], v2);
}
}
inline void cxor_f2_block(float *__restrict src1, float scalar, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto v1 = fmax(src1[i], scalar);
const auto cx = fmin(v1, -fmin(src1[i], scalar));
const auto v2 = -fmin(cx, v1);
dst[i] = fmin(src1[i], v2);
dst[i] = fmin(src1[i], -fmin(cx, v1));
}
}

inline void cxor_st12_block(float *__restrict src1, float *__restrict src2, float *__restrict dst_l,
float *__restrict dst_r, unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto v1 = fmax(src1[i], src2[i]);
const auto cx = fmin(v1, -fmin(src1[i], src2[i]));
const auto v2 = -fmin(cx, v1);
dst_l[i] = fmin(v1, v2);
dst_r[i] = fmin(src1[i], v2);
}
}
inline void cxor_st12_block(float *__restrict src1, float scalar, float *__restrict dst_l,
float *__restrict dst_r, unsigned int nquads)
inline void cxor43_3_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto v1 = fmax(src1[i], scalar);
const auto cx = fmin(v1, -fmin(src1[i], scalar));
const auto v2 = -fmin(cx, v1);
dst_l[i] = fmin(v1, v2);
dst_r[i] = fmin(src1[i], v2);
const auto cx = fmin(fmax(src1[i], src2[i]), -fmin(src1[i], src2[i]));
dst[i] = fmin(-fmin(cx, src2[i]), fmax(src1[i], -src2[i]));
}
}

inline void cxor_f3_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
inline void cxor43_4_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto cx = fmin(fmax(src1[i], src2[i]), -fmin(src1[i], src2[i]));
const auto v1 = -fmin(cx, src2[i]);
const auto v2 = fmax(src1[i], -src2[i]);
dst[i] = fmin(v1, v2);
dst[i] = fmin(-fmin(cx, src2[i]), fmax(src1[i], -cx));
}
}
inline void cxor_f3_block(float *__restrict src1, float scalar, float *__restrict dst,
unsigned int nquads)

inline void cxor93_0_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto cx = fmin(fmax(src1[i], scalar), -fmin(src1[i], scalar));
const auto v1 = -fmin(cx, scalar);
const auto v2 = fmax(src1[i], -scalar);
dst[i] = fmin(v1, v2);
auto p = src1[i] + src2[i];
auto m = src1[i] - src2[i];
dst[i] = fmin(fmax(p, m), -fmin(p, m));
}
}

inline void cxor_f4_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
inline void cxor93_1_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto cx = fmin(fmax(src1[i], src2[i]), -fmin(src1[i], src2[i]));
const auto v1 = -fmin(cx, src2[i]);
const auto v3 = fmax(src1[i], -cx);
dst[i] = fmin(v1, v3);
dst[i] = src1[i] - fmin(fmax(src2[i], fmin(src1[i], 0)), fmax(src1[i], 0));
}
}
inline void cxor_f4_block(float *__restrict src1, float scalar, float *__restrict dst,
unsigned int nquads)

inline void cxor93_2_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto cx = fmin(fmax(src1[i], scalar), -fmin(src1[i], scalar));
const auto v1 = -fmin(cx, scalar);
const auto v3 = fmax(src1[i], -cx);
dst[i] = fmin(v1, v3);
auto p = src2[i] + src1[i];
auto mf = src2[i] - src1[i];
dst[i] = fmin(src2[i], fmax(0, fmin(p, mf)));
}
}

inline void cxor_st34_block(float *__restrict src1, float *__restrict src2, float *__restrict dst_l,
float *__restrict dst_r, unsigned int nquads)
inline void cxor93_3_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto cx = fmin(fmax(src1[i], src2[i]), -fmin(src1[i], src2[i]));
const auto v1 = -fmin(cx, src2[i]);
const auto v2 = fmax(src1[i], -src2[i]);
const auto v3 = fmax(src1[i], -cx);
dst_l[i] = fmin(v1, v2);
dst_r[i] = fmin(v1, v3);
auto p = src2[i] + src1[i];
auto mf = src2[i] - src1[i];
dst[i] = fmin(fmax(src2[i], p), fmax(0, fmin(p, mf)));
}
}
inline void cxor_st34_block(float *__restrict src1, float scalar, float *__restrict dst_l,
float *__restrict dst_r, unsigned int nquads)

inline void cxor93_4_block(float *__restrict src1, float *__restrict src2, float *__restrict dst,
unsigned int nquads)
{
for (auto i = 0U; i < nquads << 2; ++i)
{
const auto cx = fmin(fmax(src1[i], scalar), -fmin(src1[i], scalar));
const auto v1 = -fmin(cx, scalar);
const auto v2 = fmax(src1[i], -scalar);
const auto v3 = fmax(src1[i], -cx);
dst_l[i] = fmin(v1, v2);
dst_r[i] = fmin(v1, v3);
auto p = src2[i] + src1[i];
auto mf = src2[i] - src1[i];
dst[i] = fmax(fmin(fmax(-src1[i], src2[i]), mf), fmin(p, -p));
}
}

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