[Makefile] Remove or refactor shell syntax highlighting

[ismell]

From the make docs:

Makefiles have the unusual property that there are really two distinct syntaxes in one file. Most of the makefile uses make syntax (see Writing Makefiles). However, recipes are meant to be interpreted by the shell and so they are written using shell syntax. The make program does not try to understand shell syntax: it performs only a very few specific translations on the content of the recipe before handing it to the shell.

I think we should make the syntax match what make is really doing.

foo:
	echo $${HELLO} $(dir src)

$$ is actually telling make to emit a $ to the shell script, while $(dir ...) is a built in make function that emits the text to the shell script. Right now the syntax tries to intermingle the two and results in them stepping over each other.

Also, the shell the make file is using might not be sh so you would get strange syntax highlighting for these cases as well.

[rwols]

Agreed! I think embedding the shell syntax in make was a mistake in hindsight.

[rwols]

I would just like to mention that I have a local branch now that should “do what make does”. I’ll upload it to GitHub soon and you can check it out (as a git remote). I do have to say that my impression of the syntax without the shell highlighting is that it is somewhat bare. However, it does correctly highlight make constructs inside “commented out” recipe lines. So that’s a good thing.

[deathaxe]

Should be fixed by #2450

[wbond]

Closing, since this has been resolved