[osflow] update rtl organization

stnolting · Aug 9, 2024 · e7f81ef · e7f81ef
1 parent 4d9dbb4
commit e7f81ef
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Showing 2 changed files with 49 additions and 6 deletions.
diff --git a/osflow/Makefile b/osflow/Makefile
@@ -32,7 +32,7 @@ run:
 Fomu:
 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(FOMU_REV)_$(DESIGN).bit)
 ifeq ($(DESIGN),Minimal)
-	$(eval IMEM_SRC := $(RTL_CORE_SRC)/mem/neorv32_imem.default.vhd)
+	$(eval IMEM_SRC := $(RTL_CORE_SRC)/neorv32_imem.vhd)
 else
 	$(eval IMEM_SRC := devices/ice40/neorv32_imem.ice40up_spram.vhd)
 endif
@@ -45,7 +45,7 @@ endif
 iCESugar-v1.5:
 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(DESIGN).bit)
 ifeq ($(DESIGN),Minimal)
-	$(eval IMEM_SRC := $(RTL_CORE_SRC)/mem/neorv32_imem.default.vhd)
+	$(eval IMEM_SRC := $(RTL_CORE_SRC)neorv32_imem.vhd)
 else
 	$(eval IMEM_SRC := devices/ice40/neorv32_imem.ice40up_spram.vhd)
 endif
@@ -69,15 +69,15 @@ UPDuino-v3.0:
 
 OrangeCrab:
 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(OrangeCrab_REV)_$(DESIGN).bit)
-	$(eval NEORV32_MEM_SRC ?= $(RTL_CORE_SRC)/mem/neorv32_imem.default.vhd $(RTL_CORE_SRC)/mem/neorv32_dmem.default.vhd)
+	$(eval NEORV32_MEM_SRC ?= $(RTL_CORE_SRC)/neorv32_imem.vhd $(RTL_CORE_SRC)/neorv32_dmem.vhd)
 	$(MAKE) \
 	  BITSTREAM="$(BITSTREAM)" \
 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \
 	  run
 
 IceZumAlhambraII:
 	$(eval BITSTREAM ?= neorv32_$(BOARD)_$(DESIGN).bit)
-	$(eval NEORV32_MEM_SRC ?= $(RTL_CORE_SRC)/mem/neorv32_imem.default.vhd $(RTL_CORE_SRC)/mem/neorv32_dmem.default.vhd)
+	$(eval NEORV32_MEM_SRC ?= $(RTL_CORE_SRC)/neorv32_imem.vhd $(RTL_CORE_SRC)/neorv32_dmem.vhd)
 	$(MAKE) \
 	  BITSTREAM="$(BITSTREAM)" \
 	  NEORV32_MEM_SRC="$(NEORV32_MEM_SRC)" \

diff --git a/osflow/filesets.mk b/osflow/filesets.mk
@@ -1,5 +1,48 @@
-# let GHDL do the magic of finding out the core's RTL hierarchy
-NEORV32_CORE_SRC := ../neorv32/rtl/core/*.vhd
+NEORV32_CORE_SRC :=                             \
+  ../neorv32/core/neorv32_package.vhd           \
+  ../neorv32/core/neorv32_clockgate.vhd         \
+  ../neorv32/core/neorv32_fifo.vhd              \
+  ../neorv32/core/neorv32_cpu_decompressor.vhd  \
+  ../neorv32/core/neorv32_cpu_control.vhd       \
+  ../neorv32/core/neorv32_cpu_regfile.vhd       \
+  ../neorv32/core/neorv32_cpu_cp_shifter.vhd    \
+  ../neorv32/core/neorv32_cpu_cp_muldiv.vhd     \
+  ../neorv32/core/neorv32_cpu_cp_bitmanip.vhd   \
+  ../neorv32/core/neorv32_cpu_cp_fpu.vhd        \
+  ../neorv32/core/neorv32_cpu_cp_cfu.vhd        \
+  ../neorv32/core/neorv32_cpu_cp_cond.vhd       \
+  ../neorv32/core/neorv32_cpu_alu.vhd           \
+  ../neorv32/core/neorv32_cpu_lsu.vhd           \
+  ../neorv32/core/neorv32_cpu_pmp.vhd           \
+  ../neorv32/core/neorv32_cpu.vhd               \
+  ../neorv32/core/neorv32_intercon.vhd          \
+  ../neorv32/core/neorv32_cache.vhd             \
+  ../neorv32/core/neorv32_dma.vhd               \
+  ../neorv32/core/neorv32_boot_rom.vhd          \
+  ../neorv32/core/neorv32_xip.vhd               \
+  ../neorv32/core/neorv32_xbus.vhd              \
+  ../neorv32/core/neorv32_cfs.vhd               \
+  ../neorv32/core/neorv32_sdi.vhd               \
+  ../neorv32/core/neorv32_gpio.vhd              \
+  ../neorv32/core/neorv32_wdt.vhd               \
+  ../neorv32/core/neorv32_mtime.vhd             \
+  ../neorv32/core/neorv32_uart.vhd              \
+  ../neorv32/core/neorv32_spi.vhd               \
+  ../neorv32/core/neorv32_twi.vhd               \
+  ../neorv32/core/neorv32_pwm.vhd               \
+  ../neorv32/core/neorv32_trng.vhd              \
+  ../neorv32/core/neorv32_neoled.vhd            \
+  ../neorv32/core/neorv32_xirq.vhd              \
+  ../neorv32/core/neorv32_gptmr.vhd             \
+  ../neorv32/core/neorv32_onewire.vhd           \
+  ../neorv32/core/neorv32_slink.vhd             \
+  ../neorv32/core/neorv32_crc.vhd               \
+  ../neorv32/core/neorv32_sysinfo.vhd           \
+  ../neorv32/core/neorv32_debug_dtm.vhd         \
+  ../neorv32/core/neorv32_debug_dm.vhd          \
+  ../neorv32/core/neorv32_top.vhd               \
+  ../neorv32/core/neorv32_application_image.vhd \
+  ../neorv32/core/neorv32_bootloader_image.vhd
 
 # Before including this partial makefile, NEORV32_MEM_SRC needs to be set
 # (containing two VHDL sources: one for IMEM and one for DMEM)