Merge pull request #134 from stnolting/dependabot/submodules/neorv32-… · stnolting/neorv32-setups@87d9f7b

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Merge pull request #134 from stnolting/dependabot/submodules/neorv32-…

…21fea6d

[Dependabot]: Bump neorv32 from `bfc4b60` to `21fea6d`

stnolting authored Nov 27, 2023

2 parents a658a53 + 8a57516 commit 87d9f7b

neorv32

Submodule neorv32 updated 29 files

+5 −0		CHANGELOG.md
+1 −1		do.py
+71 −39		docs/datasheet/cpu.adoc
+6 −1		docs/datasheet/cpu_csr.adoc
+4 −1		docs/datasheet/on_chip_debugger.adoc
+4 −9		docs/datasheet/soc.adoc
+5 −5		docs/datasheet/software_rte.adoc
+2 −2		rtl/core/mem/neorv32_imem.default.vhd
+2 −2		rtl/core/mem/neorv32_imem.legacy.vhd
+18 −6		rtl/core/neorv32_cpu.vhd
+90 −77		rtl/core/neorv32_cpu_control.vhd
+1 −1		rtl/core/neorv32_cpu_cp_bitmanip.vhd
+20 −24		rtl/core/neorv32_cpu_cp_fpu.vhd
+11 −9		rtl/core/neorv32_cpu_pmp.vhd
+113 −51		rtl/core/neorv32_cpu_regfile.vhd
+14 −7		rtl/core/neorv32_dcache.vhd
+2 −2		rtl/core/neorv32_debug_dm.vhd
+13 −8		rtl/core/neorv32_icache.vhd
+8 −6		rtl/core/neorv32_intercon.vhd
+7 −9		rtl/core/neorv32_package.vhd
+5 −5		rtl/core/neorv32_top.vhd
+3 −3		rtl/core/neorv32_wishbone.vhd
+1 −0		sim/neorv32_tb.vhd
+2 −1		sim/simple/neorv32_tb.simple.vhd
+54 −4		sw/example/floating_point_test/main.c
+11 −9		sw/example/processor_check/main.c
+1 −1		sw/example/processor_check/run_check.sh
+1 −0		sw/lib/include/neorv32_cpu_csr.h
+6 −9		sw/lib/source/neorv32_rte.c

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