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Do a JTAG reset prior to reading CPU information #430

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merged 1 commit into from
Aug 7, 2016

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andyg24
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@andyg24 andyg24 commented Jun 7, 2016

When a microcontroller is in deep sleep (stop) mode, its debug interface is turned off. Programming would therefore fail because st-flash was unable to identify the CPU. This change adds a JTAG reset prior to requesting CPU information. This change has been successfully tested with a Nucleo STM32L031 board.

(Closes #291. Closes #428, Closes #451)

when a CPU is in deep sleep mode, and its debug interface is switched
off.
@xor-gate xor-gate self-assigned this Jun 17, 2016
@xor-gate xor-gate removed their assignment Jul 21, 2016
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xor-gate commented Aug 3, 2016

I'm not sure if usb.c is the correct place to add a jtag reset. As the probe/open just looks for programmers. Why is this not working: https://github.com/texane/stlink/blob/c0177ec3872244fb04fc517397059f742e2b1cc3/src/tools/flash.c#L210-L220

Which is exactly the same.

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andyg24 commented Aug 3, 2016

It's been a while, but I believe the reset also needs to be in usb.c
because otherwise the ID is not read and programming in flash.c is not
attempted.

On Wed, Aug 3, 2016 at 11:39 AM, Jerry Jacobs [email protected]
wrote:

I'm not sure if usb.c is the correct place to add a jtag reset. As the
probe/open just looks for programmers. Why is this not working:
https://github.com/texane/stlink/blob/c0177ec3872244fb04fc517397059f742e2b1cc3/src/tools/flash.c#L210-L220


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xor-gate commented Aug 3, 2016

Yeah I think you are right, the jtag reset will toggle the NRST of the chip and everything is cleared. I'm not sure why value 2 is given, as a pin toggle should only have 0 or 1. But the protocol to the programmer is under NDA and reversed engineered so I can not tell.

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