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Fixed reading of chip ID on Cortex-M0+ core #1126

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merged 1 commit into from
Apr 13, 2021
Merged

Fixed reading of chip ID on Cortex-M0+ core #1126

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3 changes: 2 additions & 1 deletion src/common.c
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Original file line number Diff line number Diff line change
Expand Up @@ -1240,7 +1240,8 @@ int stlink_chip_id(stlink_t *sl, uint32_t *chip_id) {
cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM7) {
// STM32H7 chipid in 0x5c001000 (RM0433 pg3189)
ret = stlink_read_debug32(sl, 0x5c001000, chip_id);
} else if (cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM0) {
} else if (cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM0 ||
cpu_id.part == STLINK_REG_CMx_CPUID_PARTNO_CM0P) {
// STM32F0 (RM0091, pg914; RM0360, pg713)
// STM32L0 (RM0377, pg813; RM0367, pg915; RM0376, pg917)
// STM32G0 (RM0444, pg1367)
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1 change: 1 addition & 0 deletions src/stlink-lib/reg.h
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Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,7 @@
#define STLINK_REG_CM3_CPUID 0xE000ED00

#define STLINK_REG_CMx_CPUID_PARTNO_CM0 0xC20
#define STLINK_REG_CMx_CPUID_PARTNO_CM0P 0xC60
#define STLINK_REG_CMx_CPUID_PARTNO_CM3 0xC23
#define STLINK_REG_CMx_CPUID_PARTNO_CM4 0xC24
#define STLINK_REG_CMx_CPUID_PARTNO_CM7 0xC27
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