Changed data types to fixed width types & formatting fixes

- stlink_serial( ) - stlink_probe_usb( )
stlink-org · May 29, 2024 · f47c697 · f47c697
1 parent 91d7033
commit f47c697
Show file tree

Hide file tree

Showing 27 changed files with 216 additions and 216 deletions.
diff --git a/inc/stm32.h b/inc/stm32.h
@@ -142,37 +142,37 @@ enum stm32_chipids {
 };
 
 /* Constant STM32 option bytes base memory address */
-#define STM32_C0_OPTION_BYTES_BASE ((uint32_t)0x1fff7800)
+#define STM32_C0_OPTION_BYTES_BASE ((uint32_t) 0x1fff7800)
 
-#define STM32_F4_OPTION_BYTES_BASE ((uint32_t)0x40023c14)
+#define STM32_F4_OPTION_BYTES_BASE ((uint32_t) 0x40023c14)
 
-#define STM32_H7_OPTION_BYTES_BASE ((uint32_t)0x5200201c)
+#define STM32_H7_OPTION_BYTES_BASE ((uint32_t) 0x5200201c)
 
-#define STM32_L0_OPTION_BYTES_BASE ((uint32_t)0x1ff80000)
-#define STM32_L1_OPTION_BYTES_BASE ((uint32_t)0x1ff80000)
+#define STM32_L0_OPTION_BYTES_BASE ((uint32_t) 0x1ff80000)
+#define STM32_L1_OPTION_BYTES_BASE ((uint32_t) 0x1ff80000)
 
-#define STM32_F7_OPTION_BYTES_BASE ((uint32_t)0x1fff0000)
+#define STM32_F7_OPTION_BYTES_BASE ((uint32_t) 0x1fff0000)
 
-#define STM32_G0_OPTION_BYTES_BASE ((uint32_t)0x1fff7800)
-#define STM32_L4_OPTION_BYTES_BASE ((uint32_t)0x1fff7800)
+#define STM32_G0_OPTION_BYTES_BASE ((uint32_t) 0x1fff7800)
+#define STM32_L4_OPTION_BYTES_BASE ((uint32_t) 0x1fff7800)
 
-#define STM32_F2_OPTION_BYTES_BASE ((uint32_t)0x1fffc000)
+#define STM32_F2_OPTION_BYTES_BASE ((uint32_t) 0x1fffc000)
 
-#define STM32_F0_OPTION_BYTES_BASE ((uint32_t)0x1ffff800)
-#define STM32_F1_OPTION_BYTES_BASE ((uint32_t)0x1ffff800)
-#define STM32_F3_OPTION_BYTES_BASE ((uint32_t)0x1ffff800)
-#define STM32_G4_OPTION_BYTES_BASE ((uint32_t)0x1ffff800)
+#define STM32_F0_OPTION_BYTES_BASE ((uint32_t) 0x1ffff800)
+#define STM32_F1_OPTION_BYTES_BASE ((uint32_t) 0x1ffff800)
+#define STM32_F3_OPTION_BYTES_BASE ((uint32_t) 0x1ffff800)
+#define STM32_G4_OPTION_BYTES_BASE ((uint32_t) 0x1ffff800)
 
 /* ============ */
 /* Old defines from common.c are below */
 /* ============ */
 
 /* Constant STM32 memory address */
-#define STM32_SRAM_BASE              ((uint32_t)0x20000000)
-#define STM32_FLASH_BASE             ((uint32_t)0x08000000)
+#define STM32_SRAM_BASE              ((uint32_t) 0x20000000)
+#define STM32_FLASH_BASE             ((uint32_t) 0x08000000)
 
-#define STM32_F1_FLASH_BANK2_BASE    ((uint32_t)0x08080000)
-#define STM32_H7_FLASH_BANK2_BASE    ((uint32_t)0x08100000)
+#define STM32_F1_FLASH_BANK2_BASE    ((uint32_t) 0x08080000)
+#define STM32_H7_FLASH_BANK2_BASE    ((uint32_t) 0x08100000)
 
 #define STM32F0_DBGMCU_CR 0xE0042004
 #define STM32F0_DBGMCU_CR_IWDG_STOP 8

diff --git a/inc/stm32flash.h b/inc/stm32flash.h
@@ -48,19 +48,19 @@
 #define FLASH_CR_OPTWRE 9
 #define FLASH_CR_OBL_LAUNCH 13
 
-#define FLASH_ACR_OFF ((uint32_t)0x00)
-#define FLASH_PECR_OFF ((uint32_t)0x04)
-#define FLASH_PDKEYR_OFF ((uint32_t)0x08)
-#define FLASH_PEKEYR_OFF ((uint32_t)0x0c)
-#define FLASH_PRGKEYR_OFF ((uint32_t)0x10)
-#define FLASH_OPTKEYR_OFF ((uint32_t)0x14)
-#define FLASH_SR_OFF ((uint32_t)0x18)
-#define FLASH_OBR_OFF ((uint32_t)0x1c)
-#define FLASH_WRPR_OFF ((uint32_t)0x20)
+#define FLASH_ACR_OFF     ((uint32_t) 0x00)
+#define FLASH_PECR_OFF    ((uint32_t) 0x04)
+#define FLASH_PDKEYR_OFF  ((uint32_t) 0x08)
+#define FLASH_PEKEYR_OFF  ((uint32_t) 0x0c)
+#define FLASH_PRGKEYR_OFF ((uint32_t) 0x10)
+#define FLASH_OPTKEYR_OFF ((uint32_t) 0x14)
+#define FLASH_SR_OFF      ((uint32_t) 0x18)
+#define FLASH_OBR_OFF     ((uint32_t) 0x1c)
+#define FLASH_WRPR_OFF    ((uint32_t) 0x20)
 
 // == STM32C0 == (RM0490)
 // C0 Flash registers
-#define FLASH_C0_REGS_ADDR ((uint32_t)0x40022000)
+#define FLASH_C0_REGS_ADDR ((uint32_t) 0x40022000)
 #define FLASH_C0_KEYR (FLASH_C0_REGS_ADDR + 0x08)
 #define FLASH_C0_OPT_KEYR (FLASH_C0_REGS_ADDR + 0x0C)
 #define FLASH_C0_SR (FLASH_C0_REGS_ADDR + 0x10)
@@ -87,7 +87,7 @@
 #define FLASH_F0_OPTKEY2 0xcdef89ab
 
 // == STM32F2 ==
-#define FLASH_F2_REGS_ADDR ((uint32_t)0x40023c00)
+#define FLASH_F2_REGS_ADDR ((uint32_t) 0x40023c00)
 #define FLASH_F2_KEYR (FLASH_F2_REGS_ADDR + 0x04)
 #define FLASH_F2_OPT_KEYR (FLASH_F2_REGS_ADDR + 0x08)
 #define FLASH_F2_SR (FLASH_F2_REGS_ADDR + 0x0c)
@@ -107,7 +107,7 @@
 
 // == STM32F4 ==
 // F4 Flash registers
-#define FLASH_F4_REGS_ADDR ((uint32_t)0x40023c00)
+#define FLASH_F4_REGS_ADDR ((uint32_t) 0x40023c00)
 #define FLASH_F4_KEYR (FLASH_F4_REGS_ADDR + 0x04)
 #define FLASH_F4_OPT_KEYR (FLASH_F4_REGS_ADDR + 0x08)
 #define FLASH_F4_SR (FLASH_F4_REGS_ADDR + 0x0c)
@@ -131,7 +131,7 @@
 
 // == STM32F7 ==
 // F7 Flash registers
-#define FLASH_F7_REGS_ADDR ((uint32_t)0x40023c00)
+#define FLASH_F7_REGS_ADDR ((uint32_t) 0x40023c00)
 #define FLASH_F7_KEYR (FLASH_F7_REGS_ADDR + 0x04)
 #define FLASH_F7_OPT_KEYR (FLASH_F7_REGS_ADDR + 0x08)
 #define FLASH_F7_SR (FLASH_F7_REGS_ADDR + 0x0c)
@@ -165,7 +165,7 @@
 
 // == STM32G0/G4 ==
 // G0/G4 Flash registers (RM0440, p.146)
-#define FLASH_Gx_REGS_ADDR ((uint32_t)0x40022000)
+#define FLASH_Gx_REGS_ADDR ((uint32_t) 0x40022000)
 #define FLASH_Gx_ACR (FLASH_Gx_REGS_ADDR + 0x00)
 #define FLASH_Gx_KEYR (FLASH_Gx_REGS_ADDR + 0x08)
 #define FLASH_Gx_OPTKEYR (FLASH_Gx_REGS_ADDR + 0x0c)
@@ -232,7 +232,7 @@
 
 // == STM32H7 ==
 // H7 Flash registers
-#define FLASH_H7_REGS_ADDR ((uint32_t)0x52002000)
+#define FLASH_H7_REGS_ADDR ((uint32_t) 0x52002000)
 #define FLASH_H7_KEYR1 (FLASH_H7_REGS_ADDR + 0x04)
 #define FLASH_H7_KEYR2 (FLASH_H7_REGS_ADDR + 0x104)
 #define FLASH_H7_OPT_KEYR (FLASH_H7_REGS_ADDR + 0x08)
@@ -278,7 +278,7 @@
 
 // == STM32L0/L1/L4/L5 ==
 // Lx Flash registers
-#define FLASH_Lx_REGS_ADDR ((uint32_t)0x40023c00)
+#define FLASH_Lx_REGS_ADDR ((uint32_t) 0x40023c00)
 #define FLASH_Lx_ACR (FLASH_Lx_REGS_ADDR + 0x00)
 #define FLASH_Lx_PECR (FLASH_Lx_REGS_ADDR + 0x04)
 #define FLASH_Lx_PDKEYR (FLASH_Lx_REGS_ADDR + 0x08)
@@ -300,7 +300,7 @@
 #define FLASH_L0_OPTKEY1 0xFBEAD9C8
 #define FLASH_L0_OPTKEY2 0x24252627
 
-#define FLASH_L0_REGS_ADDR ((uint32_t)0x40022000)
+#define FLASH_L0_REGS_ADDR ((uint32_t) 0x40022000)
 
 #define FLASH_L0_PELOCK (0)
 #define FLASH_L0_OPTLOCK (2)
@@ -352,16 +352,16 @@
 #define FLASH_L4_CR_OBL_LAUNCH 27   /* Option bytes reload */
 // Bits requesting flash operations (useful when we want to clear them)
 #define FLASH_L4_CR_OPBITS                                        \
-  (uint32_t)((1lu << FLASH_L4_CR_PG) | (1lu << FLASH_L4_CR_PER) | \
+  (uint32_t) ((1lu << FLASH_L4_CR_PG) | (1lu << FLASH_L4_CR_PER) | \
              (1lu << FLASH_L4_CR_MER1) | (1lu << FLASH_L4_CR_MER1))
 // Page is fully specified by BKER and PNB
-#define FLASH_L4_CR_PAGEMASK (uint32_t)(0x1fflu << FLASH_L4_CR_PNB)
+#define FLASH_L4_CR_PAGEMASK (uint32_t) (0x1fflu << FLASH_L4_CR_PNB)
 
 #define FLASH_L4_OPTR_DUALBANK 21
 
 // == STM32L5 == (RM0438, p.241)
 // L5 Flash registers
-#define FLASH_L5_REGS_ADDR ((uint32_t)0x40022000)
+#define FLASH_L5_REGS_ADDR ((uint32_t) 0x40022000)
 #define FLASH_L5_ACR (FLASH_L5_REGS_ADDR + 0x00)
 #define FLASH_L5_NSKEYR (FLASH_L5_REGS_ADDR + 0x08)
 #define FLASH_L5_OPTKEYR (FLASH_L5_REGS_ADDR + 0x10)
@@ -399,7 +399,7 @@
 
 // == STM32WB == (RM0434)
 // WB Flash registers
-#define FLASH_WB_REGS_ADDR ((uint32_t)0x58004000)
+#define FLASH_WB_REGS_ADDR ((uint32_t) 0x58004000)
 #define FLASH_WB_ACR (FLASH_WB_REGS_ADDR + 0x00)
 #define FLASH_WB_KEYR (FLASH_WB_REGS_ADDR + 0x08)
 #define FLASH_WB_OPT_KEYR (FLASH_WB_REGS_ADDR + 0x0c)

diff --git a/src/st-flash/flash.c b/src/st-flash/flash.c
@@ -281,7 +281,7 @@ int32_t main(int32_t ac, char** av) {
                     fprintf(stderr, "open(%s) == -1\n", o.filename);
                     goto on_error;
                 }
-                err = (uint32_t)write(fd, &option_byte, 4);
+                err = (uint32_t) write(fd, &option_byte, 4);
                 if (err == -1) {
                     printf("could not write buffer to file (%d)\n", err);
                     goto on_error;

diff --git a/src/st-flash/flash_opts.c b/src/st-flash/flash_opts.c
@@ -17,7 +17,7 @@
 #include <helper.h>
 
 static bool starts_with(const char * str, const char * prefix) {
-    uint32_t n = (uint32_t)strlen(prefix);
+    uint32_t n = (uint32_t) strlen(prefix);
 
     if (strlen(str) < n) { return (false); }
 
@@ -70,7 +70,7 @@ static int32_t get_integer_from_char_array (const char *const str, uint32_t *rea
         fprintf (stderr, "*** Error: Integer greater than UINT32_MAX, cannot convert to int32_t\n");
         return (-1);
     } else {
-        *read_value = (uint32_t)value;
+        *read_value = (uint32_t) value;
         return (0);
     }
 }
@@ -201,7 +201,7 @@ int32_t flash_get_opts(struct flash_opts* o, int32_t ac, char** av) {
             if (result != 0) {
                 return (bad_arg ("--flash"));
             } else {
-                o->flash_size = (uint32_t)flash_size;
+                o->flash_size = (uint32_t) flash_size;
             }
         } else if (strcmp(av[0], "--connect-under-reset") == 0) {
             o->connect = CONNECT_UNDER_RESET;
@@ -372,7 +372,7 @@ int32_t flash_get_opts(struct flash_opts* o, int32_t ac, char** av) {
             if (result != 0) {
                 return (bad_arg ("addr"));
             } else {
-                o->addr = (stm32_addr_t)addr;
+                o->addr = (stm32_addr_t) addr;
             }
         } else if (o->format == FLASH_FORMAT_IHEX) { // expect filename
             if (ac != 1) { return (invalid_args("write <path>")); }

diff --git a/src/st-info/info.c b/src/st-info/info.c
@@ -55,7 +55,7 @@ static void stlink_probe(enum connect_type connect, int32_t freq) {
     stlink_t **stdevs;
     uint32_t size;
 
-    size = (uint32_t)stlink_probe_usb(&stdevs, connect, freq);
+    size = stlink_probe_usb(&stdevs, connect, freq);
 
     printf("Found %u stlink programmers\n", size);
 

diff --git a/src/st-trace/trace.c b/src/st-trace/trace.c
@@ -158,7 +158,7 @@ static bool parse_frequency(char* text, uint32_t* result) {
     return false;
   }
 
-  *result = (uint32_t)value;
+  *result = (uint32_t) value;
   return true;
 }
 

diff --git a/src/st-util/gdb-remote.c b/src/st-util/gdb-remote.c
@@ -20,7 +20,7 @@
 static const char hex[] = "0123456789abcdef";
 
 int32_t gdb_send_packet(int32_t fd, char* data) {
-    uint32_t data_length = (uint32_t)strlen(data);
+    uint32_t data_length = (uint32_t) strlen(data);
     int32_t length = data_length + 4;
     char* packet = malloc(length); // '$' data (hex) '#' cksum (hex)