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Fixed flash_pagesize for STM32H7A chips
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(Closes #1369)
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Nightwalker-87 committed May 29, 2024
1 parent a7fa1ae commit a70c994
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Showing 3 changed files with 5 additions and 5 deletions.
2 changes: 1 addition & 1 deletion config/chips/H7Ax_H7Bx.chip
Original file line number Diff line number Diff line change
Expand Up @@ -5,7 +5,7 @@ ref_manual_id 0455
chip_id 0x480 // STM32_CHIPID_H7Ax
flash_type H7
flash_size_reg 0x08fff80c
flash_pagesize 0x2000 // 8 KB
flash_pagesize 0x20000 // 128 KB
sram_size 0x20000 // 128 KB "DTCM"
bootrom_base 0x1ff00000
bootrom_size 0x20000 // 128 KB
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4 changes: 2 additions & 2 deletions src/stlink-lib/common_flash.c
Original file line number Diff line number Diff line change
Expand Up @@ -1250,9 +1250,9 @@ int32_t stlink_erase_flash_mass(stlink_t *sl) {

if (sl->flash_type == STM32_FLASH_TYPE_H7 && sl->chip_id != STM32_CHIPID_H7Ax) {
// set parallelism
write_flash_cr_psiz(sl, 3 /*64bit*/, BANK_1);
write_flash_cr_psiz(sl, 3 /* 64 bit */, BANK_1);
if (sl->chip_flags & CHIP_F_HAS_DUAL_BANK) {
write_flash_cr_psiz(sl, 3 /*64bit*/, BANK_2);
write_flash_cr_psiz(sl, 3 /* 64 bit */, BANK_2);
}
}

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4 changes: 2 additions & 2 deletions src/stlink-lib/flash_loader.c
Original file line number Diff line number Diff line change
Expand Up @@ -713,9 +713,9 @@ int32_t stlink_flashloader_start(stlink_t *sl, flash_loader_t *fl) {
}
if (sl->chip_id != STM32_CHIPID_H7Ax) {
// set parallelism
write_flash_cr_psiz(sl, 3 /* 64bit */, BANK_1);
write_flash_cr_psiz(sl, 3 /* 64 bit */, BANK_1);
if (sl->chip_flags & CHIP_F_HAS_DUAL_BANK) {
write_flash_cr_psiz(sl, 3 /* 64bit */, BANK_2);
write_flash_cr_psiz(sl, 3 /* 64 bit */, BANK_2);
}
}
} else {
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