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Releases: sinara-hw/Kasli

v2.0.2

12 Aug 16:02
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Small fixes and alternative components.

  • Added SMA washers (#74)
  • Added note with max and recommended sma input level (#83, #100)
  • Changed C3 to a higher voltage rating (#87)
  • Fixed #93
  • Changed LD14 (#67)
  • Fixed #96
  • Added PCA9539 as an alternative GPIO expander
  • Added switching frequency selection to IC7
  • Added LT1938 as an alternative to TLV62150
  • Added additional I2C bus dedicated to 24AA02* EEPROM on FPGA pins P19 and P20 (#97)
  • Removed unused DDR3 DQ termination resistors from FPGA_SDRAM (they weren't placed on the PCB, they were just on schematics)
  • Updated version number in schematics
  • Moved 712RA connector back 0.5mm
  • Updated copyright year

v2.0.1

23 Sep 15:08
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Kasli v2.0.1

Added 10 uF capacitors on input and output of FL1 and FL2
Added P3V3 test point.

v2.0

15 Dec 16:52
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RC2

Close #65
Added DNPed resistors on unused complementary LVPECL outputs - Close #63
Close #61
Close #59
Switched Si549 to CERNlib
MMCX net lengths were equalized (xsignals were broken). Additionally some xsignals for differential clocks were broken as well. After fixing some net lengths were adjusted within differential pairs.

v2.0rc1

28 Nov 16:37
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v2.0rc1 Pre-release
Pre-release

Before manufacturing checks, layout is finished.

v2.0 Schematic Review

01 Oct 11:07
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v2.0 Schematic Review Pre-release
Pre-release
Ready for schematic review

- Removed external termination SMA input to the FPGA (placed an optional 51 termination resistor if balun is not used)
- Updated version number in schematic sheets
- Readded pin swapping rules

Kasli v1.1 (with grounded connectors)

08 Jan 11:05
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SMA and MMCX connectors are grounded in this release.

Kasli v1.1

12 Jun 15:31
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Release version 1.1