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Emit OpExecutionMode SpacingEqual for Domain stage #5696

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Domain stage should emit one more OpExecutionMode with SpacingEqual, similary to how Hull stage does.

Currently Hull stage emits four OpExecutionMode as following:

  OpExecutionMode %hullMain SpacingEqual
  OpExecutionMode %hullMain OutputVertices 4
  OpExecutionMode %hullMain VertexOrderCw
  OpExecutionMode %hullMain Quads

And Domain stage emits only one OpExecutionMode:

  OpExecutionMode %domainMain Quads

This commit adds the following instruction for Domain stage:

  OpExecutionMode %domainMain SpacingEqual

It is because the Vulkan Validation Layer prints error when the Domain shader didn't have OpeExecutionMode SpacingEqual.

SpacingEqual corresponds to an attribute, [partitioning("integer")], given to the Hull stage. Although Domain stage is not marked with same attribute, it is assumed to use the same value used for matching Hull Stage.

The error message from VVL is following:

vkCreateShadersEXT(): pCreateInfos[2].stage is VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
but spacing is not specified. The Vulkan spec states: If codeType is VK_SHADER_CODE_TYPE_SPIRV_EXT,
and stage is VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT, pCode must contain an OpExecutionMode
instruction specifying the spacing of segments on the edges of tessellated primitives
(https://vulkan.lunarg.com/doc/view/1.3.283.0/windows/1.3-extensions/vkspec.html#VUID-VkShaderCreateInfoEXT-codeType-08874)

Closes #5184

Domain stage should emit one more `OpExecutionMode` with
`SpacingEqual`, similary to how Hull stage does.

Currently Hull stage emits four OpExecutionMode as following:
  OpExecutionMode %hullMain SpacingEqual
  OpExecutionMode %hullMain OutputVertices 4
  OpExecutionMode %hullMain VertexOrderCw
  OpExecutionMode %hullMain Quads

And Domain stage emits only one OpExecutionMode:
  OpExecutionMode %domainMain Quads

This commit adds the following instruction for Domain stage:
  OpExecutionMode %domainMain SpacingEqual

It is because the Vulkan Validation Layer prints error when the
Domain shader didn't have `OpeExecutionMode SpacingEqual`.

`SpacingEqual` corresponds to an attribute, `[partitioning("integer")]`,
given to the Hull stage.  Although Domain stage is not marked with
same attribute, it is assumed to use the same value used for
matching Hull Stage.

The error message from VVL is following:
```
vkCreateShadersEXT(): pCreateInfos[2].stage is VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT,
but spacing is not specified. The Vulkan spec states: If codeType is VK_SHADER_CODE_TYPE_SPIRV_EXT,
and stage is VK_SHADER_STAGE_TESSELLATION_EVALUATION_BIT, pCode must contain an OpExecutionMode
instruction specifying the spacing of segments on the edges of tessellated primitives
(https://vulkan.lunarg.com/doc/view/1.3.283.0/windows/1.3-extensions/vkspec.html#VUID-VkShaderCreateInfoEXT-codeType-08874)
```
@jkwak-work jkwak-work added the pr: non-breaking PRs without breaking changes label Nov 27, 2024
@jkwak-work jkwak-work self-assigned this Nov 27, 2024
@jkwak-work jkwak-work requested a review from a team as a code owner November 27, 2024 21:37
@expipiplus1 expipiplus1 enabled auto-merge (squash) November 29, 2024 06:54
@expipiplus1 expipiplus1 disabled auto-merge November 29, 2024 07:56
@expipiplus1 expipiplus1 merged commit c005fe9 into shader-slang:master Nov 29, 2024
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SPIRV: SpvExecutionMode is required for Stage::Domain (similar to Stage::Hull)
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