Fix some misleading target feature aliases #103750
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Some changes occurred in compiler/rustc_codegen_gcc cc @antoyo |
workingjubilee
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| adx, aes, avx, avx2, avx512bf16, avx512bitalg, avx512bw, avx512cd, avx512dq, avx512er, avx512f, avx512ifma, | ||
| avx512pf, avx512vbmi, avx512vbmi2, avx512vl, avx512vnni, avx512vp2intersect, avx512vpopcntdq, | ||
| bmi1, bmi2, cmpxchg16b, ermsb, f16c, fma, fxsr, gfni, lzcnt, movbe, pclmulqdq, popcnt, rdrand, rdseed, rtm, | ||
| sha, sse, sse2, sse3, sse4.1, sse4.2, sse4a, ssse3, tbm, vaes, vpclmulqdq, xsave, xsavec, xsaveopt, xsaves |
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I feel almost like these should be sorted by theme rather than alphabetical, but that can happen some other day.
| @@ -179,6 +179,7 @@ const X86_ALLOWED_FEATURES: &[(&str, Option<Symbol>)] = &[ | |||
| ("f16c", Some(sym::f16c_target_feature)), | |||
| ("fma", None), | |||
| ("fxsr", None), | |||
| ("gfni", Some(sym::avx512_target_feature)), | |||
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It's honestly kind of weird that this isn't prefixed v for vgfni like the other features.
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I think it's because the v prefix implies VEX- or EVEX-encoded instructions (e.g. VGF2P8AFFINEQB), but GFNI also introduces plain SSE instructions (e.g. GF2P8AFFINEQB). This is the same distinction as PCLMULQDQ vs VPCLMULQDQ or AES vs VAES for example, but the difference there is the different encodings have separate CPUID flags, whereas GFNI has just one.
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Looks good to me. @bors r+ |
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📌 Commit 2a7c3d02722704e96095a9d734d9db3bbe72ab56 has been approved by It is now in the queue for this repository. |
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Co-authored-by: Jubilee <[email protected]>
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I accidentally synced my fork, didn't realize this PR was linked to my master branch. Not sure if you'll need to reapprove the rebased commits... |
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@bors r+ |
Dylan-DPC
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…ilee Fix some misleading target feature aliases This is the first half of a fix for rust-lang#100752. It looks like these aliases were added in rust-lang#78361 and slipped under the radar, as these features are not AVX512. These features _do_ add AVX512 instructions when used _in combination_ with AVX512F, but without AVX512F, these features still provide 128-bit and 256-bit vector instructions. A user might be mislead into thinking these features imply AVX512F (which is true of the actual AVX512 features). This PR allows using the names as defined by LLVM, which matches Intel documentation. A future PR should change the `std::arch` intrinsics to use these names, and finally remove these aliases from rustc. r? `@workingjubilee` cc `@Amanieu`
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Nov 16, 2022
…ilee Fix some misleading target feature aliases This is the first half of a fix for rust-lang#100752. It looks like these aliases were added in rust-lang#78361 and slipped under the radar, as these features are not AVX512. These features _do_ add AVX512 instructions when used _in combination_ with AVX512F, but without AVX512F, these features still provide 128-bit and 256-bit vector instructions. A user might be mislead into thinking these features imply AVX512F (which is true of the actual AVX512 features). This PR allows using the names as defined by LLVM, which matches Intel documentation. A future PR should change the `std::arch` intrinsics to use these names, and finally remove these aliases from rustc. r? ``@workingjubilee`` cc ``@Amanieu``
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…iaskrgr Rollup of 8 pull requests Successful merges: - rust-lang#103750 (Fix some misleading target feature aliases) - rust-lang#104137 (Issue error when -C link-self-contained option is used on unsupported platforms) - rust-lang#104317 (cleanup and dedupe CTFE and Miri error reporting) - rust-lang#104335 (Only do parser recovery on retried macro matching) - rust-lang#104394 (various cleanups to try to reduce the use of spans inside method resolution) - rust-lang#104459 (rustdoc: remove unused JS IIFE from main.js) - rust-lang#104462 (rustdoc: remove pointless CSS `.rightside { padding-right: 2px }`) - rust-lang#104466 (rustdoc: remove no-op CSS `#crate-search-div { display: inline-block }`) Failed merges: r? `@ghost` `@rustbot` modify labels: rollup
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Jan 6, 2023
…ilee Fix some misleading target feature aliases This is the first half of a fix for rust-lang#100752. It looks like these aliases were added in rust-lang#78361 and slipped under the radar, as these features are not AVX512. These features _do_ add AVX512 instructions when used _in combination_ with AVX512F, but without AVX512F, these features still provide 128-bit and 256-bit vector instructions. A user might be mislead into thinking these features imply AVX512F (which is true of the actual AVX512 features). This PR allows using the names as defined by LLVM, which matches Intel documentation. A future PR should change the `std::arch` intrinsics to use these names, and finally remove these aliases from rustc. r? ```@workingjubilee``` cc ```@Amanieu```
Aaron1011
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…iaskrgr Rollup of 8 pull requests Successful merges: - rust-lang#103750 (Fix some misleading target feature aliases) - rust-lang#104137 (Issue error when -C link-self-contained option is used on unsupported platforms) - rust-lang#104317 (cleanup and dedupe CTFE and Miri error reporting) - rust-lang#104335 (Only do parser recovery on retried macro matching) - rust-lang#104394 (various cleanups to try to reduce the use of spans inside method resolution) - rust-lang#104459 (rustdoc: remove unused JS IIFE from main.js) - rust-lang#104462 (rustdoc: remove pointless CSS `.rightside { padding-right: 2px }`) - rust-lang#104466 (rustdoc: remove no-op CSS `#crate-search-div { display: inline-block }`) Failed merges: r? `@ghost` `@rustbot` modify labels: rollup
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…nieu Remove misleading target feature aliases Fixes rust-lang#100752. This is a follow up to rust-lang#103750. These aliases could not be completely removed until rust-lang/stdarch#1355 landed. cc `@Amanieu`
antoyo
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…ilee Fix some misleading target feature aliases This is the first half of a fix for rust-lang#100752. It looks like these aliases were added in rust-lang#78361 and slipped under the radar, as these features are not AVX512. These features _do_ add AVX512 instructions when used _in combination_ with AVX512F, but without AVX512F, these features still provide 128-bit and 256-bit vector instructions. A user might be mislead into thinking these features imply AVX512F (which is true of the actual AVX512 features). This PR allows using the names as defined by LLVM, which matches Intel documentation. A future PR should change the `std::arch` intrinsics to use these names, and finally remove these aliases from rustc. r? ```@workingjubilee``` cc ```@Amanieu```
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This is the first half of a fix for #100752. It looks like these aliases were added in #78361 and slipped under the radar, as these features are not AVX512. These features do add AVX512 instructions when used in combination with AVX512F, but without AVX512F, these features still provide 128-bit and 256-bit vector instructions. A user might be mislead into thinking these features imply AVX512F (which is true of the actual AVX512 features). This PR allows using the names as defined by LLVM, which matches Intel documentation.
A future PR should change the
std::archintrinsics to use these names, and finally remove these aliases from rustc.r? @workingjubilee
cc @Amanieu