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Rollup merge of #117879 - durin42:nneg-zext, r=nikic
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tests: update check for inferred nneg on zext

This was broken by upstream
llvm/llvm-project@dc6d077. It's easy enough to use a regex match to support both, so we do that.

r? `@nikic`
`@rustbot` label: +llvm-main
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matthiaskrgr authored Nov 13, 2023
2 parents a87ad4e + 5d8d700 commit 6d5d509
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions tests/codegen/unchecked_shifts.rs
Original file line number Diff line number Diff line change
Expand Up @@ -31,7 +31,7 @@ pub unsafe fn unchecked_shl_unsigned_smaller(a: u16, b: u32) -> u16 {
#[no_mangle]
pub unsafe fn unchecked_shl_unsigned_bigger(a: u64, b: u32) -> u64 {
// CHECK-NOT: assume
// CHECK: %[[EXT:.+]] = zext i32 %b to i64
// CHECK: %[[EXT:.+]] = zext{{( nneg)?}} i32 %b to i64
// CHECK: shl i64 %a, %[[EXT]]
a.unchecked_shl(b)
}
Expand Down Expand Up @@ -63,7 +63,7 @@ pub unsafe fn unchecked_shr_signed_smaller(a: i16, b: u32) -> i16 {
#[no_mangle]
pub unsafe fn unchecked_shr_signed_bigger(a: i64, b: u32) -> i64 {
// CHECK-NOT: assume
// CHECK: %[[EXT:.+]] = zext i32 %b to i64
// CHECK: %[[EXT:.+]] = zext{{( nneg)?}} i32 %b to i64
// CHECK: ashr i64 %a, %[[EXT]]
a.unchecked_shr(b)
}

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