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Auto merge of rust-lang#77272 - jonas-schievink:rollup-dydo5kn, r=jon…
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…as-schievink

Rollup of 7 pull requests

Successful merges:

 - rust-lang#76839 (Add asm! support for MIPS)
 - rust-lang#77203 (Check for missing const-stability attributes in `rustc_passes`)
 - rust-lang#77249 (Separate `private_intra_doc_links` and `broken_intra_doc_links` into separate lints)
 - rust-lang#77252 (reduce overlong line)
 - rust-lang#77256 (Fix typo in ExpnData documentation)
 - rust-lang#77262 (Remove duplicate comment)
 - rust-lang#77263 (Clean up trivial if let)

Failed merges:

r? `@ghost`
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bors committed Sep 27, 2020
2 parents 1d216fe + 344ab3f commit 4529af9
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Showing 22 changed files with 520 additions and 30 deletions.
25 changes: 25 additions & 0 deletions compiler/rustc_codegen_llvm/src/asm.rs
Original file line number Diff line number Diff line change
Expand Up @@ -259,6 +259,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {}
InlineAsmArch::Nvptx64 => {}
InlineAsmArch::Hexagon => {}
InlineAsmArch::Mips => {}
}
}
if !options.contains(InlineAsmOptions::NOMEM) {
Expand Down Expand Up @@ -505,6 +506,8 @@ fn reg_to_llvm(reg: InlineAsmRegOrRegClass, layout: Option<&TyAndLayout<'tcx>>)
InlineAsmRegClass::Arm(ArmInlineAsmRegClass::dreg)
| InlineAsmRegClass::Arm(ArmInlineAsmRegClass::qreg) => "w",
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => "r",
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => "f",
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => "h",
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => "r",
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => "l",
Expand Down Expand Up @@ -551,6 +554,7 @@ fn modifier_to_llvm(
}
}
InlineAsmRegClass::Hexagon(_) => None,
InlineAsmRegClass::Mips(_) => None,
InlineAsmRegClass::Nvptx(_) => None,
InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::reg)
| InlineAsmRegClass::RiscV(RiscVInlineAsmRegClass::freg) => None,
Expand Down Expand Up @@ -603,6 +607,8 @@ fn dummy_output_type(cx: &CodegenCx<'ll, 'tcx>, reg: InlineAsmRegClass) -> &'ll
cx.type_vector(cx.type_i64(), 2)
}
InlineAsmRegClass::Hexagon(HexagonInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg) => cx.type_i32(),
InlineAsmRegClass::Mips(MipsInlineAsmRegClass::freg) => cx.type_f32(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg16) => cx.type_i16(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg32) => cx.type_i32(),
InlineAsmRegClass::Nvptx(NvptxInlineAsmRegClass::reg64) => cx.type_i64(),
Expand Down Expand Up @@ -700,6 +706,12 @@ fn llvm_fixup_input(
value
}
}
(InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg), Abi::Scalar(s)) => match s.value {
// MIPS only supports register-length arithmetics.
Primitive::Int(Integer::I8 | Integer::I16, _) => bx.zext(value, bx.cx.type_i32()),
Primitive::F32 => bx.bitcast(value, bx.cx.type_i32()),
_ => value,
},
_ => value,
}
}
Expand Down Expand Up @@ -768,6 +780,13 @@ fn llvm_fixup_output(
value
}
}
(InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg), Abi::Scalar(s)) => match s.value {
// MIPS only supports register-length arithmetics.
Primitive::Int(Integer::I8, _) => bx.trunc(value, bx.cx.type_i8()),
Primitive::Int(Integer::I16, _) => bx.trunc(value, bx.cx.type_i16()),
Primitive::F32 => bx.bitcast(value, bx.cx.type_f32()),
_ => value,
},
_ => value,
}
}
Expand Down Expand Up @@ -831,6 +850,12 @@ fn llvm_fixup_output_type(
layout.llvm_type(cx)
}
}
(InlineAsmRegClass::Mips(MipsInlineAsmRegClass::reg), Abi::Scalar(s)) => match s.value {
// MIPS only supports register-length arithmetics.
Primitive::Int(Integer::I8 | Integer::I16, _) => cx.type_i32(),
Primitive::F32 => cx.type_i32(),
_ => layout.llvm_type(cx),
},
_ => layout.llvm_type(cx),
}
}
1 change: 1 addition & 0 deletions compiler/rustc_lint/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -305,6 +305,7 @@ fn register_builtins(store: &mut LintStore, no_interleave_lints: bool) {
add_lint_group!(
"rustdoc",
BROKEN_INTRA_DOC_LINKS,
PRIVATE_INTRA_DOC_LINKS,
INVALID_CODEBLOCK_ATTRIBUTES,
MISSING_DOC_CODE_EXAMPLES,
PRIVATE_DOC_TESTS
Expand Down
2 changes: 1 addition & 1 deletion compiler/rustc_mir/src/const_eval/fn_queries.rs
Original file line number Diff line number Diff line change
Expand Up @@ -50,7 +50,7 @@ pub fn is_min_const_fn(tcx: TyCtxt<'_>, def_id: DefId) -> bool {
None => {
if let Some(stab) = tcx.lookup_stability(def_id) {
if stab.level.is_stable() {
tcx.sess.span_err(
tcx.sess.delay_span_bug(
tcx.def_span(def_id),
"stable const functions must have either `rustc_const_stable` or \
`rustc_const_unstable` attribute",
Expand Down
3 changes: 0 additions & 3 deletions compiler/rustc_mir/src/transform/check_consts/validation.rs
Original file line number Diff line number Diff line change
Expand Up @@ -204,9 +204,6 @@ impl Validator<'mir, 'tcx> {
pub fn check_body(&mut self) {
let ConstCx { tcx, body, def_id, .. } = *self.ccx;

// HACK: This function has side-effects???? Make sure we call it.
let _ = crate::const_eval::is_min_const_fn(tcx, def_id.to_def_id());

// The local type and predicate checks are not free and only relevant for `const fn`s.
if self.const_kind() == hir::ConstContext::ConstFn {
// Prevent const trait methods from being annotated as `stable`.
Expand Down
38 changes: 31 additions & 7 deletions compiler/rustc_passes/src/stability.rs
Original file line number Diff line number Diff line change
Expand Up @@ -459,6 +459,21 @@ impl<'tcx> MissingStabilityAnnotations<'tcx> {
self.tcx.sess.span_err(span, &format!("{} has missing stability attribute", descr));
}
}

fn check_missing_const_stability(&self, hir_id: HirId, span: Span) {
let stab_map = self.tcx.stability();
let stab = stab_map.local_stability(hir_id);
if stab.map_or(false, |stab| stab.level.is_stable()) {
let const_stab = stab_map.local_const_stability(hir_id);
if const_stab.is_none() {
self.tcx.sess.span_err(
span,
"`#[stable]` const functions must also be either \
`#[rustc_const_stable]` or `#[rustc_const_unstable]`",
);
}
}
}
}

impl<'tcx> Visitor<'tcx> for MissingStabilityAnnotations<'tcx> {
Expand All @@ -469,14 +484,23 @@ impl<'tcx> Visitor<'tcx> for MissingStabilityAnnotations<'tcx> {
}

fn visit_item(&mut self, i: &'tcx Item<'tcx>) {
match i.kind {
// Inherent impls and foreign modules serve only as containers for other items,
// they don't have their own stability. They still can be annotated as unstable
// and propagate this unstability to children, but this annotation is completely
// optional. They inherit stability from their parents when unannotated.
hir::ItemKind::Impl { of_trait: None, .. } | hir::ItemKind::ForeignMod(..) => {}
// Inherent impls and foreign modules serve only as containers for other items,
// they don't have their own stability. They still can be annotated as unstable
// and propagate this unstability to children, but this annotation is completely
// optional. They inherit stability from their parents when unannotated.
if !matches!(
i.kind,
hir::ItemKind::Impl { of_trait: None, .. } | hir::ItemKind::ForeignMod(..)
) {
self.check_missing_stability(i.hir_id, i.span);
}

_ => self.check_missing_stability(i.hir_id, i.span),
// Ensure `const fn` that are `stable` have one of `rustc_const_unstable` or
// `rustc_const_stable`.
if self.tcx.features().staged_api
&& matches!(&i.kind, hir::ItemKind::Fn(sig, ..) if sig.header.is_const())
{
self.check_missing_const_stability(i.hir_id, i.span);
}

intravisit::walk_item(self, i)
Expand Down
11 changes: 11 additions & 0 deletions compiler/rustc_session/src/lint/builtin.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1826,6 +1826,17 @@ declare_lint! {
"failures in resolving intra-doc link targets"
}

declare_lint! {
/// This is a subset of `broken_intra_doc_links` that warns when linking from
/// a public item to a private one. This is a `rustdoc` only lint, see the
/// documentation in the [rustdoc book].
///
/// [rustdoc book]: ../../../rustdoc/lints.html#private_intra_doc_links
pub PRIVATE_INTRA_DOC_LINKS,
Warn,
"linking from a public item to a private one"
}

declare_lint! {
/// The `invalid_codeblock_attributes` lint detects code block attributes
/// in documentation examples that have potentially mis-typed values. This
Expand Down
3 changes: 0 additions & 3 deletions compiler/rustc_session/src/session.rs
Original file line number Diff line number Diff line change
Expand Up @@ -1103,9 +1103,6 @@ impl Session {
self.used_attrs.lock().is_marked(attr)
}

/// Returns `true` if the attribute's path matches the argument. If it matches, then the
/// attribute is marked as used.
/// Returns `true` if the attribute's path matches the argument. If it
/// matches, then the attribute is marked as used.
///
Expand Down
4 changes: 2 additions & 2 deletions compiler/rustc_span/src/hygiene.rs
Original file line number Diff line number Diff line change
Expand Up @@ -702,7 +702,7 @@ pub struct ExpnData {
/// The `DefId` of the macro being invoked,
/// if this `ExpnData` corresponds to a macro invocation
pub macro_def_id: Option<DefId>,
/// The crate that originally created this `ExpnData. During
/// The crate that originally created this `ExpnData`. During
/// metadata serialization, we only encode `ExpnData`s that were
/// created locally - when our serialized metadata is decoded,
/// foreign `ExpnId`s will have their `ExpnData` looked up
Expand Down Expand Up @@ -759,7 +759,7 @@ impl ExpnData {

#[inline]
pub fn is_root(&self) -> bool {
if let ExpnKind::Root = self.kind { true } else { false }
matches!(self.kind, ExpnKind::Root)
}
}

Expand Down
132 changes: 132 additions & 0 deletions compiler/rustc_target/src/asm/mips.rs
Original file line number Diff line number Diff line change
@@ -0,0 +1,132 @@
use super::{InlineAsmArch, InlineAsmType};
use rustc_macros::HashStable_Generic;
use std::fmt;

def_reg_class! {
Mips MipsInlineAsmRegClass {
reg,
freg,
}
}

impl MipsInlineAsmRegClass {
pub fn valid_modifiers(self, _arch: super::InlineAsmArch) -> &'static [char] {
&[]
}

pub fn suggest_class(self, _arch: InlineAsmArch, _ty: InlineAsmType) -> Option<Self> {
None
}

pub fn suggest_modifier(
self,
_arch: InlineAsmArch,
_ty: InlineAsmType,
) -> Option<(char, &'static str)> {
None
}

pub fn default_modifier(self, _arch: InlineAsmArch) -> Option<(char, &'static str)> {
None
}

pub fn supported_types(
self,
_arch: InlineAsmArch,
) -> &'static [(InlineAsmType, Option<&'static str>)] {
match self {
Self::reg => types! { _: I8, I16, I32, F32; },
Self::freg => types! { _: F32; },
}
}
}

// The reserved registers are somewhat taken from <https://git.io/JUR1k#L150>.
def_regs! {
Mips MipsInlineAsmReg MipsInlineAsmRegClass {
v0: reg = ["$2", "$v0"],
v1: reg = ["$3", "$v1"],
a0: reg = ["$4", "$a0"],
a1: reg = ["$5", "$a1"],
a2: reg = ["$6", "$a2"],
a3: reg = ["$7", "$a3"],
// FIXME: Reserve $t0, $t1 if in mips16 mode.
t0: reg = ["$8", "$t0"],
t1: reg = ["$9", "$t1"],
t2: reg = ["$10", "$t2"],
t3: reg = ["$11", "$t3"],
t4: reg = ["$12", "$t4"],
t5: reg = ["$13", "$t5"],
t6: reg = ["$14", "$t6"],
t7: reg = ["$15", "$t7"],
s0: reg = ["$16", "$s0"],
s1: reg = ["$17", "$s1"],
s2: reg = ["$18", "$s2"],
s3: reg = ["$19", "$s3"],
s4: reg = ["$20", "$s4"],
s5: reg = ["$21", "$s5"],
s6: reg = ["$22", "$s6"],
s7: reg = ["$23", "$s7"],
t8: reg = ["$24", "$t8"],
t9: reg = ["$25", "$t9"],
f0: freg = ["$f0"],
f1: freg = ["$f1"],
f2: freg = ["$f2"],
f3: freg = ["$f3"],
f4: freg = ["$f4"],
f5: freg = ["$f5"],
f6: freg = ["$f6"],
f7: freg = ["$f7"],
f8: freg = ["$f8"],
f9: freg = ["$f9"],
f10: freg = ["$f10"],
f11: freg = ["$f11"],
f12: freg = ["$f12"],
f13: freg = ["$f13"],
f14: freg = ["$f14"],
f15: freg = ["$f15"],
f16: freg = ["$f16"],
f17: freg = ["$f17"],
f18: freg = ["$f18"],
f19: freg = ["$f19"],
f20: freg = ["$f20"],
f21: freg = ["$f21"],
f22: freg = ["$f22"],
f23: freg = ["$f23"],
f24: freg = ["$f24"],
f25: freg = ["$f25"],
f26: freg = ["$f26"],
f27: freg = ["$f27"],
f28: freg = ["$f28"],
f29: freg = ["$f29"],
f30: freg = ["$f30"],
f31: freg = ["$f31"],
#error = ["$0", "$zero"] =>
"constant zero cannot be used as an operand for inline asm",
#error = ["$1", "$at"] =>
"reserved for assembler (Assembler Temp)",
#error = ["$26", "$k0"] =>
"OS-reserved register cannot be used as an operand for inline asm",
#error = ["$27", "$k1"] =>
"OS-reserved register cannot be used as an operand for inline asm",
#error = ["$28", "$gp"] =>
"the global pointer cannot be used as an operand for inline asm",
#error = ["$29", "$sp"] =>
"the stack pointer cannot be used as an operand for inline asm",
#error = ["$30", "$s8", "$fp"] =>
"the frame pointer cannot be used as an operand for inline asm",
#error = ["$31", "$ra"] =>
"the return address register cannot be used as an operand for inline asm",
}
}

impl MipsInlineAsmReg {
pub fn emit(
self,
out: &mut dyn fmt::Write,
_arch: InlineAsmArch,
_modifier: Option<char>,
) -> fmt::Result {
out.write_str(self.name())
}
}
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