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Add UI test to verify invalid loads are not generated
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| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,194 @@ | ||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:43:11 | ||
| | | ||
| LL | asm!("li x16, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x16, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:46:11 | ||
| | | ||
| LL | asm!("li x17, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x17, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:49:11 | ||
| | | ||
| LL | asm!("li x18, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x18, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:52:11 | ||
| | | ||
| LL | asm!("li x19, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x19, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:55:11 | ||
| | | ||
| LL | asm!("li x20, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x20, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:58:11 | ||
| | | ||
| LL | asm!("li x21, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x21, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:61:11 | ||
| | | ||
| LL | asm!("li x22, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x22, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:64:11 | ||
| | | ||
| LL | asm!("li x23, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x23, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:67:11 | ||
| | | ||
| LL | asm!("li x24, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x24, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:70:11 | ||
| | | ||
| LL | asm!("li x25, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x25, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:73:11 | ||
| | | ||
| LL | asm!("li x26, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x26, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:76:11 | ||
| | | ||
| LL | asm!("li x27, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x27, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:79:11 | ||
| | | ||
| LL | asm!("li x28, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x28, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:82:11 | ||
| | | ||
| LL | asm!("li x29, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x29, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:85:11 | ||
| | | ||
| LL | asm!("li x30, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x30, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:88:11 | ||
| | | ||
| LL | asm!("li x31, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x31, 0 | ||
| | ^ | ||
|
|
||
| error: aborting due to 16 previous errors | ||
|
|
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
| Original file line number | Diff line number | Diff line change |
|---|---|---|
| @@ -0,0 +1,194 @@ | ||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:43:11 | ||
| | | ||
| LL | asm!("li x16, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x16, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:46:11 | ||
| | | ||
| LL | asm!("li x17, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x17, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:49:11 | ||
| | | ||
| LL | asm!("li x18, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x18, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:52:11 | ||
| | | ||
| LL | asm!("li x19, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x19, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:55:11 | ||
| | | ||
| LL | asm!("li x20, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x20, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:58:11 | ||
| | | ||
| LL | asm!("li x21, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x21, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:61:11 | ||
| | | ||
| LL | asm!("li x22, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x22, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:64:11 | ||
| | | ||
| LL | asm!("li x23, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x23, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:67:11 | ||
| | | ||
| LL | asm!("li x24, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x24, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:70:11 | ||
| | | ||
| LL | asm!("li x25, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x25, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:73:11 | ||
| | | ||
| LL | asm!("li x26, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x26, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:76:11 | ||
| | | ||
| LL | asm!("li x27, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x27, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:79:11 | ||
| | | ||
| LL | asm!("li x28, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x28, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:82:11 | ||
| | | ||
| LL | asm!("li x29, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x29, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:85:11 | ||
| | | ||
| LL | asm!("li x30, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x30, 0 | ||
| | ^ | ||
|
|
||
| error: invalid operand for instruction | ||
| --> $DIR/riscv32e-registers.rs:88:11 | ||
| | | ||
| LL | asm!("li x31, 0"); | ||
| | ^ | ||
| | | ||
| note: instantiated into assembly here | ||
| --> <inline asm>:1:5 | ||
| | | ||
| LL | li x31, 0 | ||
| | ^ | ||
|
|
||
| error: aborting due to 16 previous errors | ||
|
|
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