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RISC-V TLSDESC support #1041

Merged
merged 6 commits into from
Sep 14, 2023
Merged

RISC-V TLSDESC support #1041

merged 6 commits into from
Sep 14, 2023

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ishitatsuyuki
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@ishitatsuyuki ishitatsuyuki commented May 25, 2023

elf/elf.h Show resolved Hide resolved
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Added relaxation support. Tested with basic assembly, with WIP gas tree (should upload in a few minutes) at https://github.com/ishitatsuyuki/binutils/tree/rv-tlsdesc.

u64 A = rel2.r_addend;
if (!sym2.has_tlsdesc(ctx)) {
u64 val = S + A - ctx.tp_addr;
if (sign_extend(val, 11) == val)
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Not satisfied with how we're computing this twice (here and in shrink_section), so I'm open to suggestions for how to deduplicate this logic.

elf/elf.h Outdated Show resolved Hide resolved
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rui314 commented Aug 7, 2023

The inline design is in fact simpler to implement, since we don't need to worry about allocation or keeping track of the list of allocations, but this doesn't matter much for cross-arch libcs since they will have a common helper to do that anyway.

That's my feeling too. If it had four slots from the beginning, it would have been simpler. But we already have code for two-slots design, so it doesn't make much difference anyway. And if it doesn't make much difference, I'd make it consist with others than diverging from them.

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We have spec approved now. I'll rebase and undraft this soon.

For example, when the leader's instruction is removed and a follower is right
next to it, the follower's relocation can point to the follower's address
itself. In this case the leader's relocation may lie before or after the
follower, so just search for both.

Signed-off-by: Tatsuyuki Ishi <[email protected]>
@ishitatsuyuki ishitatsuyuki marked this pull request as ready for review September 13, 2023 04:44
@ishitatsuyuki ishitatsuyuki changed the title Draft: RISC-V TLSDESC support RISC-V TLSDESC support Sep 13, 2023
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TODO: We should probably get tests on this (right now I do it manually with my PoC). I'd expect portable C ones to work once we have compiler support shipped.

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Actually, I think I need to look a bit more how to deal with IE relaxation (now that it's in the common framework).

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rui314 commented Sep 13, 2023

Yup. But as long as it works with your wip patches, I don't care too much about writing tests in assembly. The feature will eventually be tested once your patches are merged.

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rui314 commented Sep 13, 2023

As to relaxation, you can just mimic what we are doing for ARM64, can't you?

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As to relaxation, you can just mimic what we are doing for ARM64, can't you?

Yeah, it should be doable.

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IE is now working, I've also got the testsuite to pass with a few hacks to use locally built toolchain.

@rui314 rui314 merged commit c2116aa into rui314:main Sep 14, 2023
@ishitatsuyuki ishitatsuyuki deleted the rv-tlsdesc branch September 14, 2023 03:55
write_utype(loc, desc + A - P);
} else {
if (removed_bytes == 0) {
*(ul32 *)loc = 0x537; // lui a0,<hi20>
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Not directly related to this change, but I think there's one more relaxation opportunity here. If the hi20 bits are small enough, you can use C.LUI instead of LUI if the C extension is available, which should save two bytes.

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2 participants