Add rvvm*nofma configuration

rivosinc · Nov 15, 2023 · 395a6f6 · 395a6f6
1 parent 1c097ca
commit 395a6f6
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Showing 12 changed files with 156 additions and 30 deletions.
diff --git a/CMakeLists.txt b/CMakeLists.txt
@@ -46,7 +46,7 @@ set(SLEEF_ALL_SUPPORTED_EXTENSIONS
   NEON32 NEON32VFPV4                                    # Aarch32
   VSX VSXNOFMA VSX3 VSX3NOFMA                           # PPC64
   VXE VXENOFMA VXE2 VXE2NOFMA	                        # IBM Z
-  RVVM1 RVVM2                                           # RISC-V Vectors
+  RVVM1NOFMA RVVM1 RVVM2NOFMA RVVM2                     # RISC-V Vectors
   PUREC_SCALAR PURECFMA_SCALAR                          # Generic type
   CACHE STRING "List of SIMD architectures supported by libsleef."
   )
@@ -57,7 +57,7 @@ set(SLEEF_SUPPORTED_LIBM_EXTENSIONS
   NEON32 NEON32VFPV4                                    # Aarch32
   VSX VSXNOFMA VSX3 VSX3NOFMA                           # PPC64
   VXE VXENOFMA VXE2 VXE2NOFMA	                        # IBM Z
-  RVVM1 RVVM2                                           # RISC-V Vectors
+  RVVM1NOFMA RVVM1 RVVM2NOFMA RVVM2                     # RISC-V Vectors
   PUREC_SCALAR PURECFMA_SCALAR                          # Generic type
   CACHE STRING "List of SIMD architectures supported by libsleef."
   )

diff --git a/Configure.cmake b/Configure.cmake
@@ -168,7 +168,9 @@ set(CLANG_FLAGS_ENABLE_VXE2 "-march=z15;-mzvector")
 set(CLANG_FLAGS_ENABLE_VXE2NOFMA "-march=z15;-mzvector")
 # RISC-V
 set(CLANG_FLAGS_ENABLE_RVVM1 "-march=rv64gcv_zba_zbb_zbs")
+set(CLANG_FLAGS_ENABLE_RVVM1NOFMA "-march=rv64gcv_zba_zbb_zbs")
 set(CLANG_FLAGS_ENABLE_RVVM2 "-march=rv64gcv_zba_zbb_zbs")
+set(CLANG_FLAGS_ENABLE_RVVM2NOFMA "-march=rv64gcv_zba_zbb_zbs")
 
 set(FLAGS_OTHERS "")
 
@@ -634,6 +636,10 @@ if(SLEEF_ARCH_RISCV64 AND NOT DISABLE_RVVM1)
   int main() {
     vint32m1_t r = __riscv_vmv_v_x_i32m1(1, __riscv_v_min_vlen / 32); }"
     COMPILER_SUPPORTS_RVVM1)
+
+  if(COMPILER_SUPPORTS_RVVM1)
+    set(COMPILER_SUPPORTS_RVVM1NOFMA 1)
+  endif()
 endif()
 
 if (ENFORCE_RVVM1 AND NOT COMPILER_SUPPORTS_RVVM1)
@@ -652,6 +658,10 @@ if(SLEEF_ARCH_RISCV64 AND NOT DISABLE_RVVM2)
   int main() {
     vint32m2_t r = __riscv_vmv_v_x_i32m2(1, __riscv_v_min_vlen / 32); }"
     COMPILER_SUPPORTS_RVVM2)
+
+  if(COMPILER_SUPPORTS_RVVM2)
+    set(COMPILER_SUPPORTS_RVVM2NOFMA 1)
+  endif()
 endif()
 
 if (ENFORCE_RVVM2 AND NOT COMPILER_SUPPORTS_RVVM2)

diff --git a/src/arch/helperrvv.h b/src/arch/helperrvv.h
@@ -10,7 +10,7 @@
 #endif
 #endif // #if !defined(SLEEF_GENHEADER)
 
-#if CONFIG == 1
+#if CONFIG == 1 || CONFIG == 2
 #define ISANAME "RISC-V Vector Extension with Min. VLEN"
 #define SLEEF_RVV_VLEN __riscv_v_min_vlen
 #else
@@ -45,23 +45,27 @@ static INLINE int vavailability_i(int name) { return -1; }
 
 #ifdef ENABLE_RVV_SP
 // Types that conflict with ENABLE_RVV_DP
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
 typedef vuint64m2_t vmask;
 typedef vbool32_t vopmask;
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
 typedef vuint64m4_t vmask;
 typedef vbool16_t vopmask;
+#else
+#error "unknown rvv lmul"
 #endif
 #endif
 
 #ifdef ENABLE_RVV_DP
 // Types that conflict with ENABLE_RVV_SP
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
 typedef vuint64m1_t vmask;
 typedef vbool64_t vopmask;
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
 typedef vuint64m2_t vmask;
 typedef vbool32_t vopmask;
+#else
+#error "unknown rvv lmul"
 #endif
 #endif
 
@@ -73,7 +77,7 @@ typedef vbool32_t vopmask;
 // wide-LMUL register group. In the largest cases (ddi_t and ddf_t), this
 // requires LMUL=8 if the base type (vfloat or vdouble) has LMUL=2, meaning
 // LMUL=2 is currently the widest option for SLEEF function argument types.
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
 
 typedef vint32mf2_t vint;
 typedef vfloat64m1_t vdouble;
@@ -156,7 +160,7 @@ typedef vint32m4_t dfi_t;
 #define SLEEF_RVV_DP_LOAD_VD __riscv_vle64_v_f64m1
 #define SLEEF_RVV_DP_LOAD_VI __riscv_vle32_v_i32mf2
 
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
 
 typedef vint32m1_t vint;
 typedef vfloat64m2_t vdouble;
@@ -239,6 +243,8 @@ typedef vint32m8_t dfi_t;
 #define SLEEF_RVV_DP_LOAD_VD __riscv_vle64_v_f64m2
 #define SLEEF_RVV_DP_LOAD_VI __riscv_vle32_v_i32m1
 
+#else
+#error "unknown rvv lmul"
 #endif // ENABLE_RVVM1
 
 ////////////////////////////////////////////////////////////////////////////////
@@ -635,19 +641,23 @@ static INLINE vdouble digetd_vd_di(di_t d) {
   return SLEEF_RVV_DP_VGET_VD(SLEEF_RVV_DP_VREINTERPRET_VD2_4VI(d), 0);
 }
 static INLINE vint digeti_vi_di(di_t d) {
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
   return __riscv_vlmul_trunc_i32mf2(SLEEF_RVV_DP_VGET_VI(d, 1));
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
   return SLEEF_RVV_DP_VGET_VI(d, 2);
+#else
+#error "unknown rvv lmul"
 #endif
 }
 static INLINE di_t disetdi_di_vd_vi(vdouble d, vint i) {
   di_t res;
   res = SLEEF_RVV_DP_VREINTERPRET_4VI_VD2(__riscv_vset(SLEEF_RVV_DP_VREINTERPRET_VD2_4VI(res), 0, d));
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
   res = __riscv_vset(res, 1, __riscv_vlmul_ext_i32m1(i));
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
   res = __riscv_vset(res, 2, i);
+#else
+#error "unknown rvv lmul"
 #endif
   return res;
 }
@@ -656,19 +666,23 @@ static INLINE vdouble2 ddigetdd_vd2_ddi(ddi_t d) {
   return SLEEF_RVV_DP_VGET_VD2(SLEEF_RVV_DP_VREINTERPRET_4VD_8VI(d), 0);
 }
 static INLINE vint ddigeti_vi_ddi(ddi_t d) {
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
   return __riscv_vlmul_trunc_i32mf2(SLEEF_RVV_DP_VGET_VI(d, 2));
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
   return SLEEF_RVV_DP_VGET_VI(d, 4);
+#else
+#error "unknown rvv lmul"
 #endif
 }
 static INLINE ddi_t ddisetddi_ddi_vd2_vi(vdouble2 v, vint i) {
   ddi_t res;
   res = SLEEF_RVV_DP_VREINTERPRET_8VI_4VD(__riscv_vset(SLEEF_RVV_DP_VREINTERPRET_4VD_8VI(res), 0, v));
-#ifdef ENABLE_RVVM1
+#if defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA)
   res = __riscv_vset(res, 2, __riscv_vlmul_ext_i32m1(i));
-#else
+#elif defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA)
   res = __riscv_vset(res, 4, i);
+#else
+#error "unknown rvv lmul"
 #endif
   return res;
 }

diff --git a/src/common/commonfuncs.h b/src/common/commonfuncs.h
@@ -3,7 +3,7 @@
 //    (See accompanying file LICENSE.txt or copy at
 //          http://www.boost.org/LICENSE_1_0.txt)
 
-#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 typedef struct {
   vdouble x, y, z;
 } vdouble3;
@@ -210,7 +210,7 @@ static INLINE CONST VECTOR_CC vdouble vtoward0_vd_vd(vdouble x) { // returns nex
   return vsel_vd_vo_vd_vd(veq_vo_vd_vd(x, vcast_vd_d(0)), vcast_vd_d(0), t);
 }
 
-#if !(defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 static INLINE CONST vdouble vmulsign_vd_vd_vd(vdouble x, vdouble y) {
   return vreinterpret_vd_vm(vxor_vm_vm_vm(vreinterpret_vm_vd(x), vsignbit_vm_vd(y)));
 }
@@ -220,7 +220,7 @@ static INLINE CONST VECTOR_CC vdouble vsign_vd_vd(vdouble d) {
   return vmulsign_vd_vd_vd(vcast_vd_d(1.0), d);
 }
 
-#if !(defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 static INLINE CONST VECTOR_CC vdouble vorsign_vd_vd_vd(vdouble x, vdouble y) {
   return vreinterpret_vd_vm(vor_vm_vm_vm(vreinterpret_vm_vd(x), vsignbit_vm_vd(y)));
 }

diff --git a/src/common/dd.h b/src/common/dd.h
@@ -3,7 +3,7 @@
 //    (See accompanying file LICENSE.txt or copy at
 //          http://www.boost.org/LICENSE_1_0.txt)
 
-#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 #if !defined(ENABLE_CUDA)
 typedef struct {
   vdouble x, y;

diff --git a/src/common/df.h b/src/common/df.h
@@ -3,7 +3,7 @@
 //    (See accompanying file LICENSE.txt or copy at
 //          http://www.boost.org/LICENSE_1_0.txt)
 
-#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 #if !defined(ENABLE_CUDA)
 typedef struct {
   vfloat x, y;

diff --git a/src/libm-tester/iutsimd.c b/src/libm-tester/iutsimd.c
@@ -349,12 +349,24 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2;
 #include "renamervvm1.h"
 #endif
 
+#ifdef ENABLE_RVVM1NOFMA
+#define CONFIG 2
+#include "helperrvv.h"
+#include "renamervvm1nofma.h"
+#endif
+
 #ifdef ENABLE_RVVM2
 #define CONFIG 1
 #include "helperrvv.h"
 #include "renamervvm2.h"
 #endif
 
+#ifdef ENABLE_RVVM2NOFMA
+#define CONFIG 2
+#include "helperrvv.h"
+#include "renamervvm2nofma.h"
+#endif
+
 #ifdef ENABLE_PUREC_SCALAR
 #include "renamepurec_scalar.h"
 #if !defined(USE_INLINE_HEADER)
@@ -438,12 +450,12 @@ int check_feature(double d, float f) {
   return 0;
 }
 
-#if defined(ENABLE_DP) && !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2) || defined(USE_INLINE_HEADER))
+#if defined(ENABLE_DP) && !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA) || defined(USE_INLINE_HEADER))
 static vdouble vd2getx_vd_vd2(vdouble2 v) { return v.x; }
 static vdouble vd2gety_vd_vd2(vdouble2 v) { return v.y; }
 #endif
 
-#if defined(ENABLE_SP) && !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2) || defined(USE_INLINE_HEADER))
+#if defined(ENABLE_SP) && !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA) || defined(USE_INLINE_HEADER))
 static vfloat vf2getx_vf_vf2(vfloat2 v) { return v.x; }
 static vfloat vf2gety_vf_vf2(vfloat2 v) { return v.y; }
 #endif

diff --git a/src/libm-tester/tester2simddp.c b/src/libm-tester/tester2simddp.c
@@ -199,6 +199,14 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2;
 #include "sleef.h"
 #endif
 
+#ifdef ENABLE_RVVM1NOFMA
+#define CONFIG 2
+#define ENABLE_RVV_DP
+#include "helperrvv.h"
+#include "renamervvm1nofma.h"
+#include "sleef.h"
+#endif
+
 #ifdef ENABLE_RVVM2
 #define CONFIG 1
 #define ENABLE_RVV_DP
@@ -207,6 +215,14 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2;
 #include "sleef.h"
 #endif
 
+#ifdef ENABLE_RVVM2NOFMA
+#define CONFIG 2
+#define ENABLE_RVV_DP
+#include "helperrvv.h"
+#include "renamervvm2nofma.h"
+#include "sleef.h"
+#endif
+
 #ifdef ENABLE_PUREC_SCALAR
 #define CONFIG 1
 #include "helperpurec_scalar.h"
@@ -225,7 +241,7 @@ typedef Sleef_float_2 vfloat2;
 
 //
 
-#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 static vdouble vd2getx_vd_vd2(vdouble2 v) { return v.x; }
 static vdouble vd2gety_vd_vd2(vdouble2 v) { return v.y; }
 #endif

diff --git a/src/libm-tester/tester2simdsp.c b/src/libm-tester/tester2simdsp.c
@@ -199,6 +199,14 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2;
 #include "sleef.h"
 #endif
 
+#ifdef ENABLE_RVVM1NOFMA
+#define CONFIG 2
+#define ENABLE_RVV_DP
+#include "helperrvv.h"
+#include "renamervvm1nofma.h"
+#include "sleef.h"
+#endif
+
 #ifdef ENABLE_RVVM2
 #define CONFIG 1
 #define ENABLE_RVV_SP
@@ -207,6 +215,14 @@ typedef Sleef_SLEEF_VECTOR_FLOAT_2 vfloat2;
 #include "sleef.h"
 #endif
 
+#ifdef ENABLE_RVVM2NOFMA
+#define CONFIG 2
+#define ENABLE_RVV_DP
+#include "helperrvv.h"
+#include "renamervvm2nofma.h"
+#include "sleef.h"
+#endif
+
 #ifdef ENABLE_PUREC_SCALAR
 #define CONFIG 1
 #include "helperpurec_scalar.h"
@@ -225,7 +241,7 @@ typedef Sleef_float_2 vfloat2;
 
 //
 
-#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM2))
+#if !(defined(ENABLE_SVE) || defined(ENABLE_SVENOFMA) || defined(ENABLE_RVVM1) || defined(ENABLE_RVVM1NOFMA) || defined(ENABLE_RVVM2) || defined(ENABLE_RVVM2NOFMA))
 static vfloat vf2getx_vf_vf2(vfloat2 v) { return v.x; }
 static vfloat vf2gety_vf_vf2(vfloat2 v) { return v.y; }
 #endif

diff --git a/src/libm/CMakeLists.txt b/src/libm/CMakeLists.txt
@@ -63,7 +63,9 @@ elseif(SLEEF_ARCH_S390X)
 elseif(SLEEF_ARCH_RISCV64)
   set(SLEEF_HEADER_LIST
     RVVM1
+    RVVM1NOFMA
     RVVM2
+    RVVM2NOFMA
     PUREC_SCALAR
     PURECFMA_SCALAR
     )
@@ -106,7 +108,9 @@ command_arguments(HEADER_PARAMS_VXE2            finz_ 2 4 "SLEEF_VECTOR_DOUBLE"
 command_arguments(HEADER_PARAMS_VXE2NOFMA       cinz_ 2 4 "SLEEF_VECTOR_DOUBLE" "SLEEF_VECTOR_FLOAT" "SLEEF_VECTOR_INT" "SLEEF_VECTOR_INT" __VEC__ vxe2nofma)
 
 command_arguments(HEADER_PARAMS_RVVM1           finz_ x x vfloat64m1_t vfloat32m1_t vint32mf2_t vint32m1_t __riscv_v m1)
+command_arguments(HEADER_PARAMS_RVVM1NOFMA      cinz_ x x vfloat64m1_t vfloat32m1_t vint32mf2_t vint32m1_t __riscv_v m1nofma)
 command_arguments(HEADER_PARAMS_RVVM2           finz_ x x vfloat64m2_t vfloat32m2_t vint32m1_t vint32m2_t __riscv_v m2)
+command_arguments(HEADER_PARAMS_RVVM2NOFMA      cinz_ x x vfloat64m2_t vfloat32m2_t vint32m1_t vint32m2_t __riscv_v m2nofma)
 
 command_arguments(HEADER_PARAMS_DSP_SCALAR      -     1 1 double float int32_t int32_t __STDC__)
 command_arguments(HEADER_PARAMS_PUREC_SCALAR    cinz_ 1 1 double float int32_t int32_t __STDC__ purec)
@@ -155,7 +159,9 @@ command_arguments(RENAME_PARAMS_GNUABI_ADVSIMD  advsimd n 2 4 float64x2_t float3
 command_arguments(RENAME_PARAMS_GNUABI_SVE sve s x x svfloat64_t svfloat32_t svint32_t svint32_t __ARM_SVE)
 
 command_arguments(RENAME_PARAMS_RVVM1           finz_ x x m1)
+command_arguments(RENAME_PARAMS_RVVM1NOFMA      cinz_ x x m1nofma)
 command_arguments(RENAME_PARAMS_RVVM2           finz_ x x m2)
+command_arguments(RENAME_PARAMS_RVVM2NOFMA      cinz_ x x m2nofma)
 
 # ALIAS_PARAMS