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Merge pull request #26 from ved-rivos/main
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Update state and dependency
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ved-rivos authored Jan 31, 2024
2 parents 1b1334c + 33f5bba commit d300b0a
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18 changes: 10 additions & 8 deletions header.adoc
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:company: RISC-V.org
:revdate: 1/2024
:revnumber: 1.0
:revremark: This document is in stable state. See http://riscv.org/spec-state for details.
:revremark: This document is in Frozen state. See http://riscv.org/spec-state for details.
:url-riscv: http://riscv.org
:doctype: book
:preface-title: Preamble
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// Preamble
[WARNING]
.This document is in the link:http://riscv.org/spec-state[Stable state]
.This document is in the link:http://riscv.org/spec-state[Frozen state]
====
Assume anything could still change, but limited change should be expected.
This draft specification will change before being accepted as standard, so
implementations made to this draft specification will likely not conform to the
future standard.
Change is extremely unlikely. A high threshold will be used, and a change will
only occur because of some truly critical issue being identified during the
public review cycle. Any other desired or needed changes can be the subject of a
follow-on new extension. This draft specification will change before being
accepted as standard, so implementations made to this draft specification will
likely not conform to the future standard.
====

[preface]
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license text is available at
https://creativecommons.org/licenses/by/4.0/.

Copyright 2023 by RISC-V International.
Copyright 2024 by RISC-V International.

[preface]
=== Contributors
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The Zabha extension aims to address these limitations by adding support for _byte_
and _halfword_ atomic memory operations to the RISC-V Unprivileged ISA
cite:[unpriv]. The Zabha extension depends upon the A standard extension.
cite:[unpriv]. The Zabha extension depends upon the Zaamo standard extension.

include::zabha.adoc[]
//the index must precede the bibliography
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