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hybrid: fix a sentence that uses the old definition of M #336

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Aug 1, 2024
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2 changes: 1 addition & 1 deletion src/riscv-hybrid-integration.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -48,7 +48,7 @@ The CHERI execution mode is key in providing backwards compatibility with the
base RISC-V ISA. RISC-V software is able to execute unchanged in
implementations supporting both {cheri_base_ext_name} and
{cheri_default_ext_name} provided that the <<infinite-cap>> capability is installed in <<ddc>> and <<pcc>>
(with <<m_bit,M=0>>, i.e. in pass:attributes,quotes[{cheri_int_mode_name}]).
(with <<m_bit,M={INT_MODE_VALUE}>>, i.e. in pass:attributes,quotes[{cheri_int_mode_name}]).
Setting both registers to <<infinite-cap>> ensures that:

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