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fix formatting of mode name #249

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May 15, 2024
Merged

fix formatting of mode name #249

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4 changes: 2 additions & 2 deletions src/insns/cbo.clean.adoc
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Expand Up @@ -6,10 +6,10 @@
Synopsis::
Perform a clean operation on a cache block

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cbo.clean 0(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`cbo.clean 0(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/cbo.flush.adoc
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Expand Up @@ -6,10 +6,10 @@
Synopsis::
Perform a flush operation on a cache block

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cbo.flush 0(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`cbo.flush 0(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/cbo.inval.adoc
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Expand Up @@ -6,10 +6,10 @@
Synopsis::
Perform an invalidate operation on a cache block

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cbo.inval 0(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`cbo.inval 0(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/cbo.zero.adoc
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Expand Up @@ -6,10 +6,10 @@
Synopsis::
Store zeros to the full set of bytes corresponding to a cache block

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cbo.zero 0(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`cbo.zero 0(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/prefetch.i.adoc
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Expand Up @@ -7,10 +7,10 @@ Synopsis::
Provide a HINT to hardware that a cache block is likely to be accessed by an
instruction fetch in the near future

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`prefetch.i offset(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`prefetch.i offset(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/prefetch.r.adoc
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Expand Up @@ -7,10 +7,10 @@ Synopsis::
Provide a HINT to hardware that a cache block is likely to be accessed by a
data read in the near future

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`prefetch.r offset(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`prefetch.r offset(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/prefetch.w.adoc
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Expand Up @@ -7,10 +7,10 @@ Synopsis::
Provide a HINT to hardware that a cache block is likely to be accessed by a
data write in the near future

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`prefetch.w offset(cs1)`

{cheri_int_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonic::
`prefetch.w offset(rs1)`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/sh123add_32bit.adoc
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Expand Up @@ -16,10 +16,10 @@ See <<SH3ADD>>.
Synopsis::
Shift by _n_ and add for address generation (SH1ADD, SH2ADD, SH3ADD)

{cheri_cap_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonics::
`sh[1|2|3]add cd, rs1, cs2`

{cheri_int_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics::
`sh[1|2|3]add rd, rs1, rs2`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/sh123adduw_32bit.adoc
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Expand Up @@ -16,10 +16,10 @@ See <<SH3ADD.UW>>.
Synopsis::
Shift by _n_ and add unsigned word for address generation (SH1ADD.UW, SH2ADD.UW, SH3ADD.UW)

{cheri_cap_mode_name} Mnemonic (RV64)::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic (RV64)::
`sh[1|2|3]add.uw cd, rs1, cs2`

{cheri_int_mode_name} Mnemonics (RV64)::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics (RV64)::
`sh[1|2|3]add.uw rd, rs1, rs2`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/zcmp_cmpopret.adoc
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Expand Up @@ -6,10 +6,10 @@
Synopsis::
Destroy stack frame (CM.POPRET): load the return address register and 0 to 12 saved registers from the stack frame, deallocate the stack frame. Return through the return address register. 16-bit encodings.

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cm.popret \{creg_list\}, -stack_adj`

{cheri_int_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics::
`cm.popret \{reg_list\}, -stack_adj`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/zcmp_cmpopretz.adoc
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Synopsis::
Destroy stack frame (CM.POPRETZ): load the return address register and register 0 to 12 saved registers from the stack frame, deallocate the stack frame. Move zero into argument register zero. Return through the return address register. 16-bit encodings.

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cm.popretz \{creg_list\}, -stack_adj`

{cheri_int_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics::
`cm.popretz \{reg_list\}, -stack_adj`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/zcmp_cmpush.adoc
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Expand Up @@ -6,10 +6,10 @@
Synopsis::
Create stack frame (CM.PUSH): store the return address register and 0 to 12 saved registers to the stack frame, optionally allocate additional stack space. 16-bit encodings.

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cm.push \{creg_list\}, -stack_adj`

{cheri_int_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics::
`cm.push \{reg_list\}, -stack_adj`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/zcmp_cmvsa01.adoc
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Synopsis::
CM.MVSA01: Move argument registers 0 and 1 into two saved registers.

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cm.mvsa01 cr1s', cr2s'`

{cheri_int_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics::
`cm.mvsa01 r1s', r2s'`

Encoding::
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4 changes: 2 additions & 2 deletions src/insns/zcmt_cmjalt.adoc
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Synopsis::
Jump via table with link (CM.JALT), 16-bit encodings

{cheri_cap_mode_name} Mnemonic::
pass:attributes,quotes[{cheri_cap_mode_name}] Mnemonic::
`cm.jalt _index_`

{cheri_int_mode_name} Mnemonics::
pass:attributes,quotes[{cheri_int_mode_name}] Mnemonics::
`cm.jalt _index_`

Encoding::
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