Compatibility with Zilsd

[arichardson]

It looks like Zilsd (https://github.com/riscv/riscv-zilsd/blob/v0.10/zilsd.adoc) wants to repurpose the DWORD load/store opcodes for RV32 to be load-store pair. Should we use the RV64 encoding of loads/stores for RV32 to avoid this conflict?

This would solve the non-compressed conflict, however for compressed instructions they are are using the floating-point load-stores and forcing capability loads to use the RV64 format would prevent push-pop instructions from being supported. Not sure how best to approach this problem.

[arichardson]

https://lists.riscv.org/g/tech-arch-review/message/259 suggests this extension looks likely to be ratified as-is?

[tariqkurd-repo]

The confusing 16-bit encoding mapping is why I put this table in the doc:

So - I would say - that no change is needed for compressed encodings - as we already support both Zcmp (push/pop) and Zcmt (table jump) in cap mode.

For the 32-bit encodings - then we have quite a few which change depending on XLEN - so I think I'd be in favour of unifying all of them. Apart from anything else it will simplify the document - so my proposal is to move all load/store/AMO cap encodings to the RV64 ones.

[arichardson]

Simplifying the encodings to be consistent across XLEN for 32-bit encodings sounds good to me!