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Update embedded-hal dependencies #37

Merged
merged 14 commits into from
Dec 8, 2024
Merged

Update embedded-hal dependencies #37

merged 14 commits into from
Dec 8, 2024

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romancardenas
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NOTE: I still haven't tested these updates on boards. I will keep building some examples to verify that everything is alright. Furthermore, I have a few doubts about some peripherals (especially SPI, namely I don't understand why we would support SPI peripherals with MOSI or MISO missing).

@romancardenas romancardenas marked this pull request as draft October 14, 2024 14:45
@almindor
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NOTE: I still haven't tested these updates on boards. I will keep building some examples to verify that everything is alright. Furthermore, I have a few doubts about some peripherals (especially SPI, namely I don't understand why we would support SPI peripherals with MOSI or MISO missing).

By MOSI/MISO missing I'm guessing you mean using the (MOSI, SCK, CS) kind of tuples? This was done since some devices (e.g. displays) do not use MISO and do not have an actual connector for it.

@romancardenas
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So we provide SPI implementation without owning the MISO pin?

The potential problem I see here is that SPI traits usually deal with reading and writing. Maybe we need to re-structure the trait implementation to return errors in those pin configurations that are not complete (e.g., return an Error when trying to read from a display)

@romancardenas
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romancardenas commented Oct 14, 2024

I rescued a few examples from riscv-quickstart but adapted them to use semihosting for QEMU emulation. However (surprise) QEMU does not support GPIO on sifive_e targets yet 🥲

In any case, I will try to set up a proper GDB session with semihosting so we can test examples on board. Eventually, QEMU will support our needs and we can start using more robust CI workflows.

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I added new examples. It looks like QEMU supported GPIOs, but I introduced a bug in the GPIO implementation. Current examples work as expected both in QEMU and on board.

Examples are now in hifive1-examples. The idea is that hifive1-examples can work as riscv-rust-quickstart but with all the new configurations. Having all the examples in the same repo as the PAC, HAL, and BSP is useful while developing.

I managed to use semihosting on the board. However, it only works for OpenOCD, JLinkDebugger has this option disabled.
I added a few scripts to facilitate opening a debug session on board. Once I am done testing everything, I will write a nice README file.

@romancardenas
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romancardenas commented Oct 19, 2024

I still need to check:

  • GPIO input traits
  • PWM traits
  • I2C traits
  • SPI traits

@romancardenas romancardenas marked this pull request as ready for review December 7, 2024 18:09
@romancardenas
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@almindor all the e-h traits have been implemented and tested with examples that are available in this PR

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@almindor almindor left a comment

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This was a huge amount of work! Thank you!

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almindor commented Dec 7, 2024

@almindor all the e-h traits have been implemented and tested with examples that are available in this PR

Do you want to do a 0.11 release right after this is merged?

@almindor almindor merged commit 09948e7 into master Dec 8, 2024
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@romancardenas romancardenas deleted the ehv1 branch December 11, 2024 07:20
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2 participants