editorial update

riscv-non-isa · Oct 26, 2024 · d705d1b · d705d1b
1 parent c93cb6d
commit d705d1b
Showing 1 changed file with 0 additions and 4 deletions.
diff --git a/src/iommu_in_memory_queues.adoc b/src/iommu_in_memory_queues.adoc
@@ -293,10 +293,6 @@ Some implementations may cache an identity-mapped translation for the stage of
 address translation operating in `Bare` mode. Since these identity mappings
 are invariably correct, an explicit invalidation is unnecessary.
 
-Some implementations may cache an identity-mapped translation for the stage of
-address translation operating in `Bare` mode. Since these identity mappings
-are invariably correct, an explicit invalidation is unnecessary.
-
 A consequence of this specification is that an implementation may use any
 translation for an address that was valid at any time since the most recent
 `IOTINVAL` that subsumes that address. In particular, if a leaf PTE is