Proposal: Add mapping symbol #196
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Hi Guys, This PR LGTM, thanks for Kito's help. The v2 proposed patch in binutils is as follows, However, compared to the current implementation, there are some issues that might be worth discussing.
The length is only attached when the data is added by cons_worker. List all possible cases as follows, For the .fill data directive, or rs_align, I still use a $d without data length to mark the region, since it is hard to estimate the length when adding the mapping symbols. Besides, the initial purpose is to display the code which are written by users more closely, the .fill data are originally a directive to represent a data region, so add the data length to the $d seems redundant. Therefore, it would be great if we can add -
Consider the following case, which is compiled by the old toolchain without the mapping symbols. There are two problems here,
But if we add mapping symbols for the case, then we can get the more friendly result, $a1 is added at address 0x1, which is the start of the Umm seems like objdump decode the
The documentation for -D says that on ARM platforms -D should disassemble instructions. Therefore, they dump data by searching mapping symbols only when the DISASSEMBLE_DATA is set. That causes the mapping symbols are useless for -D. I am not sure if any riscv document had mentioned this, so I prefer to keep them useful, but only for text sections. Otherwise, dump other sections as data. |
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align.byte and align.nop are not valid mnemonics/directives. There is no need for special markers for alignment bytes, just fix the disassembler to correctly handle: i.e. don't try to disassemble instructions that are at odd addresses after data regions (or anything other than 0 mod 4 if RVC isn't present). |
jrtc27
reviewed
Jul 9, 2021
jrtc27
reviewed
Jul 9, 2021
riscv-elf.md
Outdated
| the original data layout. | ||
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| Mapping symbol for instruction(`$x`) means following region are instructions, | ||
| and it has an optional ISA string, which means following code region are using |
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You need to state what the rules are for the ISA string; is it anything valid for -march= (ie default versions, implied extensions, etc all supported) or is it like the .RISCV.attributes section where it must be the full exploded string?
There was a problem hiding this comment.
Below it says that the string must be same as Tag_RISCV_arch.
I would prefer don't write down the behavior for implementation, it's a hit, how to interpreter that is dependent on implementation. |
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I do see a use case for I have some experience with the llvm-objdump and llvm-symbolizer. llvm-symbolizer just excludes mapping symbols. llvm-objdump adds mapping symbols of the current section into a sorted vector and performs a binary search. A larger problem with I cannot find |
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Thanks for your suggestions, @jrtc27 @MaskRay and @kito-cheng, I have sent v3 series of patches as follows, Compared to v2,
Thanks |
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Updates:
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jim-wilson
reviewed
Jul 22, 2021
riscv-elf.md
Outdated
| the original data layout. | ||
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||
| Mapping symbol for instruction(`$x`) means following region are instructions, | ||
| and it has an optional ISA string, which means following code region are using |
There was a problem hiding this comment.
Below it says that the string must be same as Tag_RISCV_arch.
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a4lg
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track whether the architecture is still holds its default. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
added a commit
to a4lg/binutils-gdb
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track whether the architecture is still holds its default. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
to a4lg/binutils-gdb
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
added a commit
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track of whether the architecture is holding the default value. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
this pull request
Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track of whether the architecture is holding the default value. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
this pull request
Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
this pull request
Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track of whether the architecture is holding the default value. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
this pull request
Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track of whether the architecture is holding the default value. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
to a4lg/binutils-gdb
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track of whether the architecture is holding the default value. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
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Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
a4lg
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to a4lg/binutils-gdb
that referenced
this pull request
Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the assembler support to emit mapping symbols with ISA string (and partial disassembler support only to pass tests). [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * config/tc-riscv.c (struct riscv_set_options): Add new field `arch_is_default' to keep track of whether the architecture is holding the default value. (updated_riscv_subsets) New variable to keep track of whether the architecture is possibly changed and inspected to emit proper mapping symbols. (make_mapping_symbol): Make mapping symbols with ISA string if necessary. Don't emit the mapping symbol if the previous one in the same section has the same name. (riscv_elf_section_change_hook): New. Try to emit a new mapping symbol if the section is changed. (riscv_mapping_state): Don't skip if the architecture is possibly changed and the new state is "code". (s_riscv_option): Keep track of `updated_riscv_subsets' and `riscv_opts.arch_is_default'. * config/tc-riscv.h (md_elf_section_change_hook): Define as `riscv_elf_section_change_hook'. (riscv_elf_section_change_hook): Declare. * testsuite/gas/riscv/mapping-01a.d: Reflect mapping symbols with ISA string. * testsuite/gas/riscv/mapping-02a.d: Likewise. * testsuite/gas/riscv/mapping-03a.d: Likewise. * testsuite/gas/riscv/mapping-04a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-03a.d: Likewise. * testsuite/gas/riscv/mapping-norelax-04a.d: Likewise. opcodes/ChangeLog: * riscv-dis.c (riscv_get_map_state): Minimum support of mapping symbols with ISA string without actually parsing the ISA string. The only purpose of this change is to pass the tests.
a4lg
added a commit
to a4lg/binutils-gdb
that referenced
this pull request
Aug 11, 2022
The mapping symbols with ISA string is proposed to deal with so called "ifunc issue". It enables disassembling a certain range of the code with a different architecture than the rest, even if conflicting. This is useful when there's "optimized" implementation is available but dynamically switched only if a certain extension is available. This commit implements the disassembler support to parse mapping symbols with ISA string. [1] Proposal: Extend .option directive for control enabled extensions on specific code region, riscv-non-isa/riscv-asm-manual#67 [2] Proposal: Add mapping symbol, riscv-non-isa/riscv-elf-psabi-doc#196 This commit is based on Nelson Chu's proposal "RISC-V: Output mapping symbols with ISA string once .option arch is used." but heavily modified to reflect the intent of Kito's original proposal. It is also made smarter so that it no longer requires MAP_INSN_ARCH. gas/ChangeLog: * testsuite/gas/riscv/option-arch-01a.d: Reflect the disassembler support of mapping symbols with ISA string. opcodes/ChangeLog: * riscv-dis.c (initial_default_arch) Default architecture string if no ELF attributes are available. (default_arch): A copy of the default architecture string. (is_arch_mapping): New variable to keep track of whether the current architecture is deviced from a mapping symbol. (riscv_disassemble_insn): Update FPR names when a mapping symbol with ISA string is encountered. (riscv_get_map_state): Support mapping symbols with ISA string. Use `is_arch_mapping' to stop repeatedly parsing the default architecture. (riscv_get_disassembler): Safer architecture string handling. Copy the string to switch to the default while disassembling.
wangliu-iscas
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Sep 30, 2022
RISC-V Psabi pr196, riscv-non-isa/riscv-elf-psabi-doc#196 bfd/ * elfxx-riscv.c (riscv_release_subset_list): Free arch_str if needed. (riscv_copy_subset_list): Copy arch_str as well. * elfxx-riscv.h (riscv_subset_list_t): Store arch_str for each subset list. gas/ * config/tc-riscv.c (riscv_reset_subsets_list_arch_str): Update the architecture string in the subset_list. (riscv_set_arch): Call riscv_reset_subsets_list_arch_str after parsing new architecture string. (s_riscv_option): Likewise. (need_arch_map_symbol): New boolean, used to indicate if .option directives do affect instructions. (make_mapping_symbol): New boolean parameter reset_seg_arch_str. Need to generate $x+arch for MAP_INSN, and then store it into tc_segment_info_data if reset_seg_arch_str is true. (riscv_mapping_state): Decide if we need to add $x+arch for MAP_INSN. For now, only add $x+arch if the architecture strings in subset list and segment are different. Besides, always add $x+arch at the start of section, and do not add $x+arch for code alignment, since rvc for alignment can be judged from addend of R_RISCV_ALIGN. (riscv_remove_mapping_symbol): If current and previous mapping symbol have same value, then remove the current $x only if the previous is $x+arch; Otherwise, always remove previous. (riscv_add_odd_padding_symbol): Updated. (riscv_check_mapping_symbols): Don't need to add any $x+arch if need_arch_map_symbol is false, so changed them to $x. (riscv_frag_align_code): Updated since riscv_mapping_state is changed. (riscv_init_frag): Likewise. (s_riscv_insn): Likewise. (riscv_elf_final_processing): Call riscv_release_subset_list to release riscv_subsets, rather than only release arch_str in the riscv_write_out_attrs. (riscv_write_out_attrs): No need to call riscv_arch_str, just get arch_str from riscv_subsets. * config/tc-riscv.h (riscv_segment_info_type): Record current $x+arch mapping symbol of each segment. * testsuite/gas/riscv/mapping-0*: Merged and replaced by mapping.s. * testsuite/gas/riscv/mapping.s: New testcase, to test most of the cases in one file. * testsuite/gas/riscv/mapping-symbols.d: Likewise. * testsuite/gas/riscv/mapping-dis.d: Likewise. * testsuite/gas/riscv/mapping-non-arch.s: New testcase for the case that does need any $x+arch. * testsuite/gas/riscv/mapping-non-arch.d: Likewise. * testsuite/gas/riscv/option-arch-01a.d: Updated. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Set riscv_fpr_names back to riscv_fpr_names_abi or riscv_fpr_names_numeric when zfinx is disabled for some specfic code region. (riscv_get_map_state): Recognized mapping symbols $x+arch, and then reset the architecture string once the ISA is different.
wangliu-iscas
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Sep 30, 2022
RISC-V Psabi pr196, riscv-non-isa/riscv-elf-psabi-doc#196 bfd/ * elfxx-riscv.c (riscv_release_subset_list): Free arch_str if needed. (riscv_copy_subset_list): Copy arch_str as well. * elfxx-riscv.h (riscv_subset_list_t): Store arch_str for each subset list. gas/ * config/tc-riscv.c (riscv_reset_subsets_list_arch_str): Update the architecture string in the subset_list. (riscv_set_arch): Call riscv_reset_subsets_list_arch_str after parsing new architecture string. (s_riscv_option): Likewise. (need_arch_map_symbol): New boolean, used to indicate if .option directives do affect instructions. (make_mapping_symbol): New boolean parameter reset_seg_arch_str. Need to generate $x+arch for MAP_INSN, and then store it into tc_segment_info_data if reset_seg_arch_str is true. (riscv_mapping_state): Decide if we need to add $x+arch for MAP_INSN. For now, only add $x+arch if the architecture strings in subset list and segment are different. Besides, always add $x+arch at the start of section, and do not add $x+arch for code alignment, since rvc for alignment can be judged from addend of R_RISCV_ALIGN. (riscv_remove_mapping_symbol): If current and previous mapping symbol have same value, then remove the current $x only if the previous is $x+arch; Otherwise, always remove previous. (riscv_add_odd_padding_symbol): Updated. (riscv_check_mapping_symbols): Don't need to add any $x+arch if need_arch_map_symbol is false, so changed them to $x. (riscv_frag_align_code): Updated since riscv_mapping_state is changed. (riscv_init_frag): Likewise. (s_riscv_insn): Likewise. (riscv_elf_final_processing): Call riscv_release_subset_list to release riscv_subsets, rather than only release arch_str in the riscv_write_out_attrs. (riscv_write_out_attrs): No need to call riscv_arch_str, just get arch_str from riscv_subsets. * config/tc-riscv.h (riscv_segment_info_type): Record current $x+arch mapping symbol of each segment. * testsuite/gas/riscv/mapping-0*: Merged and replaced by mapping.s. * testsuite/gas/riscv/mapping.s: New testcase, to test most of the cases in one file. * testsuite/gas/riscv/mapping-symbols.d: Likewise. * testsuite/gas/riscv/mapping-dis.d: Likewise. * testsuite/gas/riscv/mapping-non-arch.s: New testcase for the case that does need any $x+arch. * testsuite/gas/riscv/mapping-non-arch.d: Likewise. * testsuite/gas/riscv/option-arch-01a.d: Updated. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Set riscv_fpr_names back to riscv_fpr_names_abi or riscv_fpr_names_numeric when zfinx is disabled for some specfic code region. (riscv_get_map_state): Recognized mapping symbols $x+arch, and then reset the architecture string once the ISA is different.
wangliu-iscas
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Sep 30, 2022
RISC-V Psabi pr196, riscv-non-isa/riscv-elf-psabi-doc#196 bfd/ * elfxx-riscv.c (riscv_release_subset_list): Free arch_str if needed. (riscv_copy_subset_list): Copy arch_str as well. * elfxx-riscv.h (riscv_subset_list_t): Store arch_str for each subset list. gas/ * config/tc-riscv.c (riscv_reset_subsets_list_arch_str): Update the architecture string in the subset_list. (riscv_set_arch): Call riscv_reset_subsets_list_arch_str after parsing new architecture string. (s_riscv_option): Likewise. (need_arch_map_symbol): New boolean, used to indicate if .option directives do affect instructions. (make_mapping_symbol): New boolean parameter reset_seg_arch_str. Need to generate $x+arch for MAP_INSN, and then store it into tc_segment_info_data if reset_seg_arch_str is true. (riscv_mapping_state): Decide if we need to add $x+arch for MAP_INSN. For now, only add $x+arch if the architecture strings in subset list and segment are different. Besides, always add $x+arch at the start of section, and do not add $x+arch for code alignment, since rvc for alignment can be judged from addend of R_RISCV_ALIGN. (riscv_remove_mapping_symbol): If current and previous mapping symbol have same value, then remove the current $x only if the previous is $x+arch; Otherwise, always remove previous. (riscv_add_odd_padding_symbol): Updated. (riscv_check_mapping_symbols): Don't need to add any $x+arch if need_arch_map_symbol is false, so changed them to $x. (riscv_frag_align_code): Updated since riscv_mapping_state is changed. (riscv_init_frag): Likewise. (s_riscv_insn): Likewise. (riscv_elf_final_processing): Call riscv_release_subset_list to release riscv_subsets, rather than only release arch_str in the riscv_write_out_attrs. (riscv_write_out_attrs): No need to call riscv_arch_str, just get arch_str from riscv_subsets. * config/tc-riscv.h (riscv_segment_info_type): Record current $x+arch mapping symbol of each segment. * testsuite/gas/riscv/mapping-0*: Merged and replaced by mapping.s. * testsuite/gas/riscv/mapping.s: New testcase, to test most of the cases in one file. * testsuite/gas/riscv/mapping-symbols.d: Likewise. * testsuite/gas/riscv/mapping-dis.d: Likewise. * testsuite/gas/riscv/mapping-non-arch.s: New testcase for the case that does need any $x+arch. * testsuite/gas/riscv/mapping-non-arch.d: Likewise. * testsuite/gas/riscv/option-arch-01a.d: Updated. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Set riscv_fpr_names back to riscv_fpr_names_abi or riscv_fpr_names_numeric when zfinx is disabled for some specfic code region. (riscv_get_map_state): Recognized mapping symbols $x+arch, and then reset the architecture string once the ISA is different.
wangliu-iscas
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Sep 30, 2022
RISC-V Psabi pr196, riscv-non-isa/riscv-elf-psabi-doc#196 bfd/ * elfxx-riscv.c (riscv_release_subset_list): Free arch_str if needed. (riscv_copy_subset_list): Copy arch_str as well. * elfxx-riscv.h (riscv_subset_list_t): Store arch_str for each subset list. gas/ * config/tc-riscv.c (riscv_reset_subsets_list_arch_str): Update the architecture string in the subset_list. (riscv_set_arch): Call riscv_reset_subsets_list_arch_str after parsing new architecture string. (s_riscv_option): Likewise. (need_arch_map_symbol): New boolean, used to indicate if .option directives do affect instructions. (make_mapping_symbol): New boolean parameter reset_seg_arch_str. Need to generate $x+arch for MAP_INSN, and then store it into tc_segment_info_data if reset_seg_arch_str is true. (riscv_mapping_state): Decide if we need to add $x+arch for MAP_INSN. For now, only add $x+arch if the architecture strings in subset list and segment are different. Besides, always add $x+arch at the start of section, and do not add $x+arch for code alignment, since rvc for alignment can be judged from addend of R_RISCV_ALIGN. (riscv_remove_mapping_symbol): If current and previous mapping symbol have same value, then remove the current $x only if the previous is $x+arch; Otherwise, always remove previous. (riscv_add_odd_padding_symbol): Updated. (riscv_check_mapping_symbols): Don't need to add any $x+arch if need_arch_map_symbol is false, so changed them to $x. (riscv_frag_align_code): Updated since riscv_mapping_state is changed. (riscv_init_frag): Likewise. (s_riscv_insn): Likewise. (riscv_elf_final_processing): Call riscv_release_subset_list to release riscv_subsets, rather than only release arch_str in the riscv_write_out_attrs. (riscv_write_out_attrs): No need to call riscv_arch_str, just get arch_str from riscv_subsets. * config/tc-riscv.h (riscv_segment_info_type): Record current $x+arch mapping symbol of each segment. * testsuite/gas/riscv/mapping-0*: Merged and replaced by mapping.s. * testsuite/gas/riscv/mapping.s: New testcase, to test most of the cases in one file. * testsuite/gas/riscv/mapping-symbols.d: Likewise. * testsuite/gas/riscv/mapping-dis.d: Likewise. * testsuite/gas/riscv/mapping-non-arch.s: New testcase for the case that does need any $x+arch. * testsuite/gas/riscv/mapping-non-arch.d: Likewise. * testsuite/gas/riscv/option-arch-01a.d: Updated. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Set riscv_fpr_names back to riscv_fpr_names_abi or riscv_fpr_names_numeric when zfinx is disabled for some specfic code region. (riscv_get_map_state): Recognized mapping symbols $x+arch, and then reset the architecture string once the ISA is different.
saagarjha
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Oct 28, 2022
RISC-V Psabi pr196, riscv-non-isa/riscv-elf-psabi-doc#196 bfd/ * elfxx-riscv.c (riscv_release_subset_list): Free arch_str if needed. (riscv_copy_subset_list): Copy arch_str as well. * elfxx-riscv.h (riscv_subset_list_t): Store arch_str for each subset list. gas/ * config/tc-riscv.c (riscv_reset_subsets_list_arch_str): Update the architecture string in the subset_list. (riscv_set_arch): Call riscv_reset_subsets_list_arch_str after parsing new architecture string. (s_riscv_option): Likewise. (need_arch_map_symbol): New boolean, used to indicate if .option directives do affect instructions. (make_mapping_symbol): New boolean parameter reset_seg_arch_str. Need to generate $x+arch for MAP_INSN, and then store it into tc_segment_info_data if reset_seg_arch_str is true. (riscv_mapping_state): Decide if we need to add $x+arch for MAP_INSN. For now, only add $x+arch if the architecture strings in subset list and segment are different. Besides, always add $x+arch at the start of section, and do not add $x+arch for code alignment, since rvc for alignment can be judged from addend of R_RISCV_ALIGN. (riscv_remove_mapping_symbol): If current and previous mapping symbol have same value, then remove the current $x only if the previous is $x+arch; Otherwise, always remove previous. (riscv_add_odd_padding_symbol): Updated. (riscv_check_mapping_symbols): Don't need to add any $x+arch if need_arch_map_symbol is false, so changed them to $x. (riscv_frag_align_code): Updated since riscv_mapping_state is changed. (riscv_init_frag): Likewise. (s_riscv_insn): Likewise. (riscv_elf_final_processing): Call riscv_release_subset_list to release subset_list of riscv_rps_as, rather than only release arch_str in the riscv_write_out_attrs. (riscv_write_out_attrs): No need to call riscv_arch_str, just get arch_str from subset_list of riscv_rps_as. * config/tc-riscv.h (riscv_segment_info_type): Record current $x+arch mapping symbol of each segment. * testsuite/gas/riscv/mapping-0*: Merged and replaced by mapping.s. * testsuite/gas/riscv/mapping.s: New testcase, to test most of the cases in one file. * testsuite/gas/riscv/mapping-symbols.d: Likewise. * testsuite/gas/riscv/mapping-dis.d: Likewise. * testsuite/gas/riscv/mapping-non-arch.s: New testcase for the case that does need any $x+arch. * testsuite/gas/riscv/mapping-non-arch.d: Likewise. * testsuite/gas/riscv/option-arch-01a.d: Updated. opcodes/ * riscv-dis.c (riscv_disassemble_insn): Set riscv_fpr_names back to riscv_fpr_names_abi or riscv_fpr_names_numeric when zfinx is disabled for some specfic code region. (riscv_get_map_state): Recognized mapping symbols $x+arch, and then reset the architecture string once the ISA is different.
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We have landed mapping symbol on binutils site and having patch under review on LLVM land (https://reviews.llvm.org/D137417). @MaskRay Do you mind give a blessing to this PR? :) |
MaskRay
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Got approve from LLD and binutils maintainer, gonna merge this :) |
- What is Mapping Symbol?
This proposal add a new special symbol class, called mapping symbol,
those symbol are used for assist disassembler to having better knowledge
of binary, it could be used for distinguish the code and data region.
Here is two kind of mapping symbol: data and instruction, and both
having an optional extra part in the symbol name for carry extra information.
Symbol Name | Meaning
:---------- | :-----------------------------------------------------------
$d | Start of a sequence of data.
$x | Start of a sequence of instructions.
$x<ISA> | Start of a sequence of instructions with <ISA> extension.
Mapping symbol are also used by other ISA for same purpose, like ARM, AArch64,
C-sky and nds32.
- Data Mapping Symbol
Data mapping symbol could having an extra length information to present
the orignal data layout.
e.g.
```
.foo:
.word 10
.word 20
```
Without mapping symbol:
```
$ riscv64-unknown-elf-gcc foo.s -c
$ riscv64-unknown-elf-gcc foo.o -c
Disassembly of section .text:
0000000000000000 <.foo>:
0: 000a c.slli zero,0x2
2: 0000 unimp
4: 0014 0x14
...
```
With mapping symbol:
```
Disassembly of section .text:
00000000 <.foo>: # $d insert here.
0: 0000000a .word 0x0000000a
4: 00000014 .word 0x00000014
```
- Instruction Mapping Symbol
Instruction mapping symbol with extra ISA info could also used for
ifunc, e.g. library are built with `rv64gc`, but few functions
like memcpy provide two version, one built with `rv64gc`, and one built with
`rv64gcv`, and select by ifunc mechanism at run-time; however the arch
attribute is recording for minimal execution environment requirement, so the ISA
information from arch attribute isn't enough for disassembler to disassemble the
`rv64gcv` version correctly.
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Revise history:
$d<N>, add rule for$x<ISA>What is Mapping Symbol
This proposal add a new special symbol class, called mapping symbol,
those symbol are used for assist disassembler to having better knowledge
of binary, it could be used for distinguish the code and data region.
Here is two kind of mapping symbol: data and instruction, and both
having an optional extra part in the symbol name for carry extra information.
Mapping symbol are also used by other ISA for same purpose, like ARM, AArch64,
C-sky and nds32.
Data Mapping Symbol
Data mapping symbol could having an extra length information to present
the orignal data layout.
e.g.
Without mapping symbol:
With mapping symbol:
Instruction Mapping Symbol
Instruction mapping symbol with extra ISA info could also used for
ifunc, e.g. library are built with
rv64gc, but few functionslike memcpy provide two version, one built with
rv64gc, and one built withrv64gcv, and select by ifunc mechanism at run-time; however the archattribute is recording for minimal execution environment requirement, so the ISA
information from arch attribute isn't enough for disassembler to disassemble the
rv64gcvversion correctly.Implementation
Here is implementation note for each component of toolchain: