ASoC: rt5677: fixed wrong DMIC ref clock

[ Upstream commit 60a8d62 ] DMIC clock source is not from codec system clock directly. it is generated from the division of system clock. And it should be 256 * sample rate of AIF1. Signed-off-by: Bard Liao <[email protected]> Signed-off-by: Mark Brown <[email protected]> Cc: [email protected] Signed-off-by: Sasha Levin <[email protected]>
raspberrypi · May 23, 2015 · 52043e7 · 52043e7
1 parent fd51553
commit 52043e7
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
@@ -644,7 +644,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w,
 {
 	struct snd_soc_codec *codec = w->codec;
 	struct rt5677_priv *rt5677 = snd_soc_codec_get_drvdata(codec);
-	int idx = rl6231_calc_dmic_clk(rt5677->sysclk);
+	int idx = rl6231_calc_dmic_clk(rt5677->lrck[RT5677_AIF1] << 8);
 
 	if (idx < 0)
 		dev_err(codec->dev, "Failed to set DMIC clock\n");