Refine basic block declarations

It should be as effortless as possible to implement decode.[ch].
Meanwhile, basic block specific declarations would appear in private
header.

src/decode.c

@@ -1736,18 +1736,3 @@ bool rv_decode(rv_insn_t *ir, uint32_t insn)
 #undef OP_UNIMP
 #undef OP
 }
-
-/* clear all block in the block map */
-void block_map_clear(block_map_t *map)
-{
-    assert(map);
-    for (uint32_t i = 0; i < map->block_capacity; i++) {
-        block_t *block = map->map[i];
-        if (block) {
-            free(block->ir);
-            free(block);
-            map->map[i] = NULL;
-        }
-    }
-    map->size = 0;
-}

src/decode.h

@@ -243,24 +243,5 @@ typedef struct {
     uint8_t insn_len;
 } rv_insn_t;
 
-/* translated basic block */
-typedef struct block {
-    uint32_t n_insn;           /**< number of instructions encompased */
-    uint32_t pc_start, pc_end; /**< address range of the basic block */
-    /* maximum of instructions encompased */
-    uint32_t insn_capacity; /**< maximum of instructions encompased */
-    struct block *predict;  /**< block prediction */
-    rv_insn_t *ir;          /**< IR as memory blocks */
-} block_t;
-
-typedef struct {
-    uint32_t block_capacity; /**< max number of entries in the block map */
-    uint32_t size;           /**< number of entries currently in the map */
-    block_t **map;           /**< block map */
-} block_map_t;
-
-/* clear all block in the block map */
-void block_map_clear(block_map_t *map);
-
 /* decode the RISC-V instruction */
 bool rv_decode(rv_insn_t *ir, const uint32_t insn);

src/riscv.c

@@ -19,6 +19,21 @@ static void block_map_init(block_map_t *map, const uint8_t bits)
     map->map = calloc(map->block_capacity, sizeof(struct block *));
 }
 
+/* clear all block in the block map */
+void block_map_clear(block_map_t *map)
+{
+    assert(map);
+    for (uint32_t i = 0; i < map->block_capacity; i++) {
+        block_t *block = map->map[i];
+        if (!block)
+            continue;
+        free(block->ir);
+        free(block);
+        map->map[i] = NULL;
+    }
+    map->size = 0;
+}
+
 riscv_user_t rv_userdata(riscv_t *rv)
 {
     assert(rv);

src/riscv_private.h

@@ -54,6 +54,24 @@ enum {
     CSR_MHARTID = 0xF14,   /* Hardware thread ID */
 };
 
+/* translated basic block */
+typedef struct block {
+    uint32_t n_insn;           /**< number of instructions encompased */
+    uint32_t pc_start, pc_end; /**< address range of the basic block */
+    uint32_t insn_capacity;    /**< maximum of instructions encompased */
+    struct block *predict;     /**< block prediction */
+    rv_insn_t *ir;             /**< IR as memory blocks */
+} block_t;
+
+typedef struct {
+    uint32_t block_capacity; /**< max number of entries in the block map */
+    uint32_t size;           /**< number of entries currently in the map */
+    block_t **map;           /**< block map */
+} block_map_t;
+
+/* clear all block in the block map */
+void block_map_clear(block_map_t *map);
+
 struct riscv_internal {
     bool halt;