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Support serialization of GateFamilies (#4715)
Exactly what it says: this PR uses the new type-serialization behavior to allow GateFamilies to be serialized. Additional work is still required for Gateset serialization - that behavior is not included in this PR.
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4 changes: 4 additions & 0 deletions
4
cirq-core/cirq/protocols/json_test_data/AnyIntegerPowerGateFamily.json
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{ | ||
"cirq_type": "AnyIntegerPowerGateFamily", | ||
"gate": "XPowGate" | ||
} |
1 change: 1 addition & 0 deletions
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cirq-core/cirq/protocols/json_test_data/AnyIntegerPowerGateFamily.repr
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cirq.AnyIntegerPowerGateFamily(cirq.ops.common_gates.XPowGate) |
4 changes: 4 additions & 0 deletions
4
cirq-core/cirq/protocols/json_test_data/AnyUnitaryGateFamily.json
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{ | ||
"cirq_type": "AnyUnitaryGateFamily", | ||
"num_qubits": 2 | ||
} |
1 change: 1 addition & 0 deletions
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cirq-core/cirq/protocols/json_test_data/AnyUnitaryGateFamily.repr
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cirq.AnyUnitaryGateFamily(num_qubits = 2) |
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[ | ||
{ | ||
"cirq_type": "GateFamily", | ||
"gate": "XPowGate", | ||
"name": "Type GateFamily: cirq.ops.common_gates.XPowGate", | ||
"description": "Accepts `cirq.Gate` instances `g` s.t. `isinstance(g, cirq.ops.common_gates.XPowGate)`", | ||
"ignore_global_phase": true | ||
}, | ||
{ | ||
"cirq_type": "GateFamily", | ||
"gate": { | ||
"cirq_type": "_PauliX", | ||
"exponent": 1.0, | ||
"global_shift": 0.0 | ||
}, | ||
"name": "XFamily", | ||
"description": "Just the X gate.", | ||
"ignore_global_phase": false | ||
} | ||
] |
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[ | ||
cirq.GateFamily(gate=cirq.ops.common_gates.XPowGate, ignore_global_phase=True), | ||
cirq.GateFamily(gate=cirq.X, name="XFamily", description="Just the X gate.", ignore_global_phase=False) | ||
] |
20 changes: 20 additions & 0 deletions
20
cirq-core/cirq/protocols/json_test_data/ParallelGateFamily.json
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[ | ||
{ | ||
"cirq_type": "ParallelGateFamily", | ||
"gate": "XPowGate", | ||
"name": "INF Parallel Type GateFamily: cirq.ops.common_gates.XPowGate", | ||
"description": "Accepts\n1. `cirq.Gate` instances `g` s.t. `isinstance(g, cirq.ops.common_gates.XPowGate)` OR\n2. `cirq.ParallelGate` instance `g` s.t. `g.sub_gate` satisfies 1. and `cirq.num_qubits(g) <= INF` OR\n3. `cirq.Operation` instance `op` s.t. `op.gate` satisfies 1. or 2.", | ||
"max_parallel_allowed": null | ||
}, | ||
{ | ||
"cirq_type": "ParallelGateFamily", | ||
"gate": { | ||
"cirq_type": "_PauliX", | ||
"exponent": 1.0, | ||
"global_shift": 0.0 | ||
}, | ||
"name": "ParallelXFamily", | ||
"description": "Up to 4 parallel X gates", | ||
"max_parallel_allowed": 4 | ||
} | ||
] |
9 changes: 9 additions & 0 deletions
9
cirq-core/cirq/protocols/json_test_data/ParallelGateFamily.repr
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[ | ||
cirq.ParallelGateFamily(gate=cirq.ops.common_gates.XPowGate, max_parallel_allowed=None), | ||
cirq.ParallelGateFamily( | ||
gate=cirq.X, | ||
name="ParallelXFamily", | ||
description=r'''Up to 4 parallel X gates''', | ||
max_parallel_allowed=4 | ||
) | ||
] |
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52 changes: 52 additions & 0 deletions
52
cirq-google/cirq_google/json_test_data/FSimGateFamily.json
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[ | ||
{ | ||
"cirq_type": "FSimGateFamily", | ||
"gates_to_accept": [ | ||
"ISwapPowGate" | ||
], | ||
"gate_types_to_check": [ | ||
"FSimGate", | ||
"PhasedFSimGate", | ||
"ISwapPowGate", | ||
"PhasedISwapPowGate", | ||
"CZPowGate", | ||
"IdentityGate" | ||
], | ||
"allow_symbols": false, | ||
"atol": 1e-06 | ||
}, | ||
{ | ||
"cirq_type": "FSimGateFamily", | ||
"gates_to_accept": [ | ||
{ | ||
"cirq_type": "ISwapPowGate", | ||
"exponent": 1.0, | ||
"global_shift": 0.0 | ||
}, | ||
{ | ||
"cirq_type": "CZPowGate", | ||
"exponent": 1.0, | ||
"global_shift": 0.0 | ||
} | ||
], | ||
"gate_types_to_check": [ | ||
"FSimGate", | ||
"PhasedFSimGate", | ||
"ISwapPowGate", | ||
"PhasedISwapPowGate", | ||
"CZPowGate", | ||
"IdentityGate" | ||
], | ||
"allow_symbols": false, | ||
"atol": 1e-06 | ||
}, | ||
{ | ||
"cirq_type": "FSimGateFamily", | ||
"gates_to_accept": [], | ||
"gate_types_to_check": [ | ||
"IdentityGate" | ||
], | ||
"allow_symbols": true, | ||
"atol": 0.0001 | ||
} | ||
] |
34 changes: 34 additions & 0 deletions
34
cirq-google/cirq_google/json_test_data/FSimGateFamily.repr
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[ | ||
cirq_google.FSimGateFamily( | ||
gates_to_accept=[cirq.ops.swap_gates.ISwapPowGate], | ||
gate_types_to_check=[ | ||
cirq.ops.fsim_gate.FSimGate, | ||
cirq.ops.fsim_gate.PhasedFSimGate, | ||
cirq.ops.swap_gates.ISwapPowGate, | ||
cirq.ops.phased_iswap_gate.PhasedISwapPowGate, | ||
cirq.ops.common_gates.CZPowGate, | ||
cirq.ops.identity.IdentityGate | ||
], | ||
allow_symbols=False, | ||
atol=1e-06 | ||
), | ||
cirq_google.FSimGateFamily( | ||
gates_to_accept=[cirq.ISWAP,cirq.CZ], | ||
gate_types_to_check=[ | ||
cirq.ops.fsim_gate.FSimGate, | ||
cirq.ops.fsim_gate.PhasedFSimGate, | ||
cirq.ops.swap_gates.ISwapPowGate, | ||
cirq.ops.phased_iswap_gate.PhasedISwapPowGate, | ||
cirq.ops.common_gates.CZPowGate, | ||
cirq.ops.identity.IdentityGate | ||
], | ||
allow_symbols=False, | ||
atol=1e-06 | ||
), | ||
cirq_google.FSimGateFamily( | ||
gates_to_accept=[], | ||
gate_types_to_check=[cirq.ops.identity.IdentityGate], | ||
allow_symbols=True, | ||
atol=0.0001 | ||
) | ||
] |
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