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feat(//core/conversion/converters/impl): Round out pooling
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implementations

Implements:
- aten::max_pool1d
- aten::max_pool3d
- aten::avg_pool1d
- aten::avg_pool3d

Signed-off-by: Naren Dasan <[email protected]>
Signed-off-by: Naren Dasan <[email protected]>
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@narendasan
narendasan committed Jun 15, 2020
1 parent 0c39519 commit 7dc4af4
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Showing 2 changed files with 197 additions and 53 deletions.
195 changes: 142 additions & 53 deletions core/conversion/converters/impl/pooling.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -8,62 +8,127 @@ namespace converters {
namespace impl {
namespace {

auto pooling_registrations TRTORCH_UNUSED = RegisterNodeConversionPatterns()
.pattern({
"aten::max_pool2d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], int[2] dilation=[1, 1], bool ceil_mode=False) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
auto in = args[0].ITensor();
auto shape = util::toVec(in->getDimensions());

// Max Pool needs at least 4D input
if (shape.size() < 4) {
auto new_shape = util::toDimsPad(shape, 4);
LOG_DEBUG("Input shape is less than 4D got: " << util::toDims(shape) << ", inserting shuffle layer to reshape to 4D tensor shape: " << new_shape);
auto shuffle = ctx->net->addShuffle(*in);
shuffle->setReshapeDimensions(new_shape);
shuffle->setName((util::node_info(n) + " [Reshape to " + util::toStr(new_shape) + ']').c_str());
in = shuffle->getOutput(0);
}


auto kernel_size = util::toDimsHW(args[1].unwrapToIntList());
LOG_DEBUG("kernel_size: " << kernel_size);
auto padding = util::toDimsHW(args[3].unwrapToIntList());
LOG_DEBUG("padding: " << padding);
auto dilation = util::toDims(args[4].unwrapToIntList());

TRTORCH_ASSERT(dilation == util::toDims(std::vector<int64_t>({1,1})), "Pooling dilation is not supported in TensorRT");

LOG_DEBUG("dilation: " << dilation);
LOG_WARNING("Dilation not used in max pooling converter");
bool ceil_mode = args[5].unwrapToBool();
bool MaxPoolingConverter(ConversionCtx* ctx, const torch::jit::Node* n, args& args) {
auto in = args[0].ITensor();
auto shape = util::toVec(in->getDimensions());

// Max Pool needs at least 4D input
if (shape.size() < 4) {
auto new_shape = util::toDimsPad(shape, 4);
LOG_DEBUG("Input shape is less than 4D got: " << util::toDims(shape) << ", inserting shuffle layer to reshape to 4D tensor shape: " << new_shape);
auto shuffle = ctx->net->addShuffle(*in);
shuffle->setReshapeDimensions(new_shape);
shuffle->setName((util::node_info(n) + " [Reshape to " + util::toStr(new_shape) + ']').c_str());
in = shuffle->getOutput(0);
}


auto kernel_size = util::toDimsHW(args[1].unwrapToIntList());
LOG_DEBUG("kernel_size: " << kernel_size);
auto padding = util::toDimsHW(args[3].unwrapToIntList());
LOG_DEBUG("padding: " << padding);
auto stride = util::toDims(args[2].unwrapToIntList());
LOG_DEBUG("stride: " << stride);

auto dilation = util::toDims(args[4].unwrapToIntList());

TRTORCH_ASSERT(dilation == util::toDims(std::vector<int64_t>({1,1})), "Pooling dilation is not supported in TensorRT");

LOG_DEBUG("dilation: " << dilation);
LOG_WARNING("Dilation not used in max pooling converter");
bool ceil_mode = args[5].unwrapToBool();

auto new_layer = ctx->net->addPoolingNd(*in, nvinfer1::PoolingType::kMAX, kernel_size);
TRTORCH_CHECK(new_layer, "Unable to create Max Pool 2D layer from node: " << *n);

new_layer->setName(util::node_info(n).c_str());
new_layer->setPaddingNd(padding);
if (stride.nbDims != 2 && ctx->settings.device == nvinfer1::DeviceType::kDLA) {
if (!ctx->settings.allow_gpu_fallback) {
TRTORCH_THROW_ERROR("DLA Pooling stride is limited to 2D, allow GPU fallback");
} else {
LOG_WARNING("DLA Pooling stride is limited to 2D, will run on GPU");
}
}
new_layer->setStrideNd(stride);

auto padding_mode = ceil_mode ? nvinfer1::PaddingMode::kEXPLICIT_ROUND_UP : nvinfer1::PaddingMode::kEXPLICIT_ROUND_DOWN;
new_layer->setPaddingMode(padding_mode);

new_layer->setName(util::node_info(n).c_str());
auto out_tensor = ctx->AssociateValueAndTensor(n->outputs()[0], new_layer->getOutput(0));

LOG_DEBUG("Output tensor shape: " << out_tensor->getDimensions());
return true;
}

bool AvgPoolingConverter(ConversionCtx* ctx, const torch::jit::Node* n, args& args) {
auto in = args[0].ITensor();
auto shape = util::toVec(in->getDimensions());

// Avg Pool needs at least 4D input
if (shape.size() < 4) {
auto new_shape = util::toDimsPad(shape, 4);
LOG_DEBUG("Input shape is less than 4D got: " << util::toDims(shape) << ", inserting shuffle layer to reshape to 4D tensor shape: " << new_shape);
auto shuffle = ctx->net->addShuffle(*in);
shuffle->setReshapeDimensions(new_shape);
shuffle->setName((util::node_info(n) + " [Reshape to " + util::toStr(new_shape) + ']').c_str());
in = shuffle->getOutput(0);
}


auto kernel_size = util::toDimsHW(args[1].unwrapToIntList());
LOG_DEBUG("kernel_size: " << kernel_size);
auto padding = util::toDimsHW(args[3].unwrapToIntList());
LOG_DEBUG("padding: " << padding);
auto stride = util::toDims(args[2].unwrapToIntList());
LOG_DEBUG("stride: " << stride);

bool ceil_mode = args[4].unwrapToBool();
bool count_inlcude_pad = args[5].unwrapToBool();

auto new_layer = ctx->net->addPoolingNd(*in, nvinfer1::PoolingType::kAVERAGE, kernel_size);
TRTORCH_CHECK(new_layer, "Unable to create Avg Pool 2D layer from node: " << *n);

new_layer->setName(util::node_info(n).c_str());
new_layer->setPaddingNd(padding);
if (stride.nbDims != 2 && ctx->settings.device == nvinfer1::DeviceType::kDLA) {
if (!ctx->settings.allow_gpu_fallback) {
TRTORCH_THROW_ERROR("DLA Pooling stride is limited to 2D, allow GPU fallback");
} else {
LOG_WARNING("DLA Pooling stride is limited to 2D, will run on GPU");
}
}
new_layer->setStrideNd(stride);

auto new_layer = ctx->net->addPoolingNd(*in, nvinfer1::PoolingType::kMAX, kernel_size);
TRTORCH_CHECK(new_layer, "Unable to create Max Pool 2D layer from node: " << *n);
auto padding_mode = ceil_mode ? nvinfer1::PaddingMode::kEXPLICIT_ROUND_UP : nvinfer1::PaddingMode::kEXPLICIT_ROUND_DOWN;
new_layer->setPaddingMode(padding_mode);
new_layer->setAverageCountExcludesPadding(!count_inlcude_pad);

new_layer->setName(util::node_info(n).c_str());
new_layer->setPaddingNd(padding);
if (args[2].unwrapToIntList().size() == 2) {
auto stride = util::toDims(args[2].unwrapToIntList());
new_layer->setStrideNd(stride);
}
if (!(args[6].IValue()->isNone())) {
LOG_WARNING("Divisor override is now handled by Avg Pooling Converter");
}

auto padding_mode = ceil_mode ? nvinfer1::PaddingMode::kEXPLICIT_ROUND_UP : nvinfer1::PaddingMode::kEXPLICIT_ROUND_DOWN;
new_layer->setPaddingMode(padding_mode);
new_layer->setName(util::node_info(n).c_str());
auto out_tensor = ctx->AssociateValueAndTensor(n->outputs()[0], new_layer->getOutput(0));

new_layer->setName(util::node_info(n).c_str());
auto out_tensor = ctx->AssociateValueAndTensor(n->outputs()[0], new_layer->getOutput(0));
LOG_DEBUG("Output tensor shape: " << out_tensor->getDimensions());
return true;
}

LOG_DEBUG("Output tensor shape: " << out_tensor->getDimensions());
return true;
auto pooling_registrations TRTORCH_UNUSED = RegisterNodeConversionPatterns()
.pattern({
"aten::max_pool1d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], int[2] dilation=[1, 1], bool ceil_mode=False) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
return MaxPoolingConverter(ctx, n, args);
}
}).pattern({
"aten::avg_pool2d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], bool ceil_mode=False, bool count_include_pad=True, int? divisor_override=None) -> (Tensor)",
"aten::avg_pool1d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], bool ceil_mode=False, bool count_include_pad=True) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
auto in = args[0].ITensor();
auto shape = util::toVec(in->getDimensions());

// Abg Pool needs at least 4D input
// Avg Pool needs at least 4D input
if (shape.size() < 4) {
auto new_shape = util::toDimsPad(shape, 4);
LOG_DEBUG("Input shape is less than 4D got: " << util::toDims(shape) << ", inserting shuffle layer to reshape to 4D tensor shape: " << new_shape);
Expand All @@ -78,6 +143,8 @@ auto pooling_registrations TRTORCH_UNUSED = RegisterNodeConversionPatterns()
LOG_DEBUG("kernel_size: " << kernel_size);
auto padding = util::toDimsHW(args[3].unwrapToIntList());
LOG_DEBUG("padding: " << padding);
auto stride = util::toDims(args[2].unwrapToIntList());
LOG_DEBUG("stride: " << stride);

bool ceil_mode = args[4].unwrapToBool();
bool count_inlcude_pad = args[5].unwrapToBool();
Expand All @@ -87,26 +154,48 @@ auto pooling_registrations TRTORCH_UNUSED = RegisterNodeConversionPatterns()

new_layer->setName(util::node_info(n).c_str());
new_layer->setPaddingNd(padding);
if (args[2].unwrapToIntList().size() == 2) {
auto stride = util::toDims(args[2].unwrapToIntList());
LOG_DEBUG("stride: " << stride);
new_layer->setStrideNd(stride);

if (stride.nbDims != 2 && ctx->settings.device == nvinfer1::DeviceType::kDLA) {
if (!ctx->settings.allow_gpu_fallback) {
TRTORCH_THROW_ERROR("DLA Pooling stride is limited to 2D, allow GPU fallback");
} else {
LOG_WARNING("DLA Pooling stride is limited to 2D, will run on GPU");
}
}

new_layer->setStrideNd(stride);

auto padding_mode = ceil_mode ? nvinfer1::PaddingMode::kEXPLICIT_ROUND_UP : nvinfer1::PaddingMode::kEXPLICIT_ROUND_DOWN;
new_layer->setPaddingMode(padding_mode);
new_layer->setAverageCountExcludesPadding(!count_inlcude_pad);

if (!(args[6].IValue()->isNone())) {
LOG_WARNING("Divisor override is now handled by Avg Pooling Converter");
}

new_layer->setName(util::node_info(n).c_str());
auto out_tensor = ctx->AssociateValueAndTensor(n->outputs()[0], new_layer->getOutput(0));

LOG_DEBUG("Output tensor shape: " << out_tensor->getDimensions());
return true;
}
})
.pattern({
"aten::max_pool2d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], int[2] dilation=[1, 1], bool ceil_mode=False) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
return MaxPoolingConverter(ctx, n, args);
}
}).pattern({
"aten::avg_pool2d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], bool ceil_mode=False, bool count_include_pad=True, int? divisor_override=None) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
return AvgPoolingConverter(ctx, n, args);
}
}).pattern({
"aten::max_pool3d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], int[2] dilation=[1, 1], bool ceil_mode=False) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
return MaxPoolingConverter(ctx, n, args);
}
}).pattern({
"aten::avg_pool3d(Tensor self, int[2] kernel_size, int[2] stride=[], int[2] padding=[0, 0], bool ceil_mode=False, bool count_include_pad=True, int? divisor_override=None) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
return AvgPoolingConverter(ctx, n, args);
}
}).pattern({
"aten::adaptive_avg_pool2d(Tensor self, int[2] output_size) -> (Tensor)",
[](ConversionCtx* ctx, const torch::jit::Node* n, args& args) -> bool {
Expand Down
55 changes: 55 additions & 0 deletions tests/core/converters/test_pooling.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -4,6 +4,33 @@
#include "tests/util/util.h"
#include "core/compiler.h"

TEST(Converters, ATenMaxPool1DConvertsCorrectly) {
const auto graph = R"IR(
graph(%0 : Tensor):
%1 : int = prim::Constant[value=0]()
%2 : int = prim::Constant[value=1]()
%3 : int = prim::Constant[value=2]()
%5 : bool = prim::Constant[value=0]()
%6 : int[] = prim::ListConstruct(%1, %1)
%7 : int[] = prim::ListConstruct(%2, %2)
%8 : int[] = prim::ListConstruct(%3, %3)
%10 : Tensor = aten::max_pool2d(%0, %8, %7, %6, %7, %5)
return (%10))IR";

auto g = std::make_shared<torch::jit::Graph>();
torch::jit::parseIR(graph, &*g);

auto in = at::randint(-5, 5, {1, 4, 4}, at::kCUDA);
auto params = trtorch::core::conversion::get_named_params(g->inputs(), {});
auto jit_results = trtorch::tests::util::RunGraph(g, params, {in});

in = at::clone(in);
params = trtorch::core::conversion::get_named_params(g->inputs(), {});
auto trt_results = trtorch::tests::util::RunGraphEngine(g, params, {in});

ASSERT_TRUE(trtorch::tests::util::almostEqual(jit_results[0], trt_results[0], 2e-6));
}

TEST(Converters, ATenMaxPool2DConvertsCorrectly) {
const auto graph = R"IR(
graph(%0 : Tensor):
Expand Down Expand Up @@ -32,6 +59,34 @@ TEST(Converters, ATenMaxPool2DConvertsCorrectly) {
ASSERT_TRUE(trtorch::tests::util::almostEqual(jit_results[0], trt_results[0], 2e-6));
}

TEST(Converters, ATenMaxPool3DConvertsCorrectly) {
const auto graph = R"IR(
graph(%0 : Tensor):
%1 : int = prim::Constant[value=0]()
%2 : int = prim::Constant[value=1]()
%3 : int = prim::Constant[value=2]()
%5 : bool = prim::Constant[value=0]()
%6 : int[] = prim::ListConstruct(%1, %1)
%7 : int[] = prim::ListConstruct(%2, %2)
%8 : int[] = prim::ListConstruct(%3, %3)
%10 : Tensor = aten::max_pool2d(%0, %8, %7, %6, %7, %5)
return (%10))IR";

auto g = std::make_shared<torch::jit::Graph>();
torch::jit::parseIR(graph, &*g);

//PyTorch MaxPool needs a 3D input
auto in = at::randint(-5, 5, {1, 4, 4, 4}, at::kCUDA);
auto params = trtorch::core::conversion::get_named_params(g->inputs(), {});
auto jit_results = trtorch::tests::util::RunGraph(g, params, {in});

in = at::clone(in);
params = trtorch::core::conversion::get_named_params(g->inputs(), {});
auto trt_results = trtorch::tests::util::RunGraphEngine(g, params, {in});

ASSERT_TRUE(trtorch::tests::util::almostEqual(jit_results[0], trt_results[0], 2e-6));
}

TEST(Converters, ATenAvgPool2DConvertsCorrectly) {
const auto graph = R"IR(
graph(%0 : Tensor):
Expand Down

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